Patent US5298445A successfully refreshed from Google Patents.
US5298445A
Expired / Lapsed
US
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Method for fabricating a field effect transistor
Assignee: NEC Electronics Corp
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Filing: 1993-05-21
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Granted: 1994-03-29
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Expires: 2013-05-21
Abstract
Abstract In a method for fabricating a FET of the present invention, first and second side walls are formed on a side surface of a gate electrode, and two n-GaAs layers are formed on an active layer by selective growth using the side walls as a mask. After that, the side walls are removed, whereby double recesses are formed around the gate electrode.
Inventors
- 👤 Kazunori Asano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 11:00
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/80; H10D30/87; H10D30/877; H10P; H10P14/00; H10P14/20; H10P14/22; H10P14/24; H10P14/27; H10P14/271; H10P14/29; H10P14/2901; H10P14/2907; H10P14/2911; H10P14/32; H10P14/3202; H10P14/3214; H10P14/3221; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3421; Y; Y10; Y10S; Y10S148/00; Y10S148/053; Y10S148/106; Y10S148/11
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
148 words
A method for fabricating a FET (field effect transistor), comprising the steps of: providing a semiconductor substrate on which a semiconductor active layer is formed; forming a gate electrode on said semiconductor active layer; forming a first side wall on a side surface of said gate electrode; forming a first semiconductor layer on said semiconductor active layer by selective growth using said gate electrode and said first side wall as a mask; forming a second side wall on a side surface of said gate electrode covered with said first side wall; forming a second semiconductor layer on said first semiconductor layer by selective growth using said gate electrode and said first and second side walls as a mask; removing said first and second side walls from said side surface of said gate electrode to provide a recess structure; and forming an ohmic electrode on said second semiconductor layer.
Claim 2
Independent Claim
148 words
A method for fabricating a FET (field effect transistor), comprising the steps of: providing a semiconductor substrate on which a semiconductor active layer is formed; forming a gate electrode on said semiconductor active layer; forming a first side wall on a side surface of said gate electrode; forming a first semiconductor layer on said semiconductor active layer by selective growth using said gate electrode and said first side wall as a mask; forming a second side wall on a side surface of said gate electrode covered with said first side wall; forming a second semiconductor layer on said first semiconductor layer by selective growth using said gate electrode and said first and second side walls as a mask; removing said first and second side walls from said side surface of said gate electrode to provide a recess structure; and forming an ohmic electrode on said second semiconductor layer.
Claim 3
Dependent Claim
45 words
A method for fabricating a FET (field effect transistor), according to claim 1, wherein: said semiconductor substrate is of semi-insulation GaAs; said semiconductor active layer is of n-GaAs; said first semiconductor layer is of n-GaAs; and said second semiconductor layer is of n + -GaAs.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-03-28 | 1997-09-27 | 1998-03-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-03-28 | 2001-09-27 | 2002-03-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-03-28 | 2005-09-27 | 2006-03-29 | $7700.00 | Window Closed / Lapsed |