US5274279A
Expired / Lapsed
US
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Thin film CMOS inverter
Assignee: Seiko Epson Corp
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Filing: 1992-07-31
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Granted: 1993-12-28
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Expires: 2012-07-31
Abstract
Abstract A CMOS device includes a substrate. A thin silicon film is disposed on the substrate and has a P-type thin film transistor and an N-type thin film transistor formed on the thin silicon film. The P-type thin film transistor and the N-type thin film transistor are coupled together in a CMOS configuration.
Inventors
- 👤 Toshiyuki Misawa
- 👤 Hiroyuki Oshima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 20:36
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/40; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/1333; G02F1/1345; G02F1/13454; G09; G09G; G09G3/00; G09G3/001; G09G3/002; G09G3/20; G09G3/34; G09G3/36; G09G3/3611; G09G3/3648; G09G3/3674; G09G3/3677; G09G3/3685; G09G3/3688; H10D86/60; H10W; H10W20/00; H10W20/40; G02F1/136; G02F1/1362; G02F1/136213; G02F1/136254; G09G2300/00; G09G2300/04; G09G2300/0404; G09G2300/0408; G09G2300/08; G09G2300/0809; G09G2330/00; G09G2330/12; G09G3/006; G09G3/2007; G09G3/2011; G09G3/3659
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
105 words
A CMOS inverter, comprising: at least one thin film transistor having a first gate and a first source; and second transistor means connected to and in a CMOS configuration with said at least one thin film transistor, said second transistor means having at least a second gate and a second drain; wherein said first gate and said second gate are connected together forming a single U-shaped electrode and serve as an input for the inverter, and said first source and second drain are connected together and serve as an output for the inverter; whereby a signal applied to the input is inverted at the output.
Claim 2
Dependent Claim
105 words
A CMOS inverter, comprising: at least one thin film transistor having a first gate and a first source; and second transistor means connected to and in a CMOS configuration with said at least one thin film transistor, said second transistor means having at least a second gate and a second drain; wherein said first gate and said second gate are connected together forming a single U-shaped electrode and serve as an input for the inverter, and said first source and second drain are connected together and serve as an output for the inverter; whereby a signal applied to the input is inverted at the output.
Claim 3
Dependent Claim
16 words
The CMOS inverter of claim 1, wherein the second transistor means is a thin film transistor.
Claim 4
Dependent Claim
28 words
The CMOS inverter of claim 1, wherein the first gate of the at least one thin film transistor serves as the second gate of the second transistor means.
Claim 5
Dependent Claim
28 words
The CMOS inverter of claim 2, wherein the first gate of the at least one thin film transistor serves as the second gate of the second transistor means.
References Cited (Backward Citations)
US3964941A
Cited
US4271422A
Cited
US4199773A
Cited
US4883986A
Cited
US4399605A
Cited
US4507846A
Cited
US4677735A
Cited
US4942441A
Cited
US5013939A
Cited
US5095348A
Cited
US5073723A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-12-27 | 1997-06-28 | 1997-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-12-27 | 2001-06-28 | 2001-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-12-27 | 2005-06-28 | 2005-12-28 | $7700.00 | Window Closed / Lapsed |