Bipolar transistor structure with reduced collector-to-substrate capacitance

Claim 2

A pre-processed substrate structure for a semiconductor device, the structure comprising: a substrate of semiconductor material; a dielectric for electrically insulating the substrate, the dielectric having a window therethrough; a feed-through layer of epitaxial semiconductor material in and overfilling the window and extending laterally over a portion of the dielectric; and a substantially planar continuous subcollector layer of semiconductor material that is physically separated from the substrate by the dielectric, the subcollector layer including an epitaxial portion distinct from the feedthrough layer that overlies the feed-through layer and a polycrystalline portion that overlies the dielectric.

Claim 3

A structure according to claim 1 wherein the dielectric is formed on the substrate as an intervening layer that spaces the subcollector layer apart from the substrate.

Claim 4

A semiconductor device comprising a pre-processed substrate structure according to claim 1 and a semiconductor structure including an active region in substantial alignment with the feed-through layer that lies beneath the subcollector layer.

Claim 5

A device according to claim 3 wherein the semiconductor structure comprises a collector layer over the subcollector layer, a base layer over the collector layer, an emitter layer over the base layer, and contact means for establishing electrical connections with the collector, base and emitter layers.

Claim 6

A device according to claim 4 wherein the base layer comprises silicon-germanium.

Claim 7

A pre-processed substrate structure for a semiconductor device, the structure comprising: a substrate of semiconductor material; a dielectric for electrically insulating the substrate, the dielectric having a window therethrough; a feed-through layer of epitaxial semiconductor material confined within the window, a lower surface of the feed-through layer in contact with that portion of the substrate which underlies the window; and a substantially planar continuous subcollector layer of semiconductor material that is physically separated from the substrate by the dielectric, the dielectric comprising an intervening layer between the substrate and the subcollector layer, the subcollector layer including an epitaxial portion distinct from the feed-through layer that overlies the feed-through layer in the window and a polycrystalline portion that overlies the dielectric, an upper surface of the feed-through layer in contact with that portion of the subcollector layer which overlies the window, the epitaxial portion in substantial vertical alignment with the underlying feed-through layer and the polycrystalline portion in substantial vertical alignment with the underlying dielectric.

Claim 8

A pre-processed substrate structure for a semiconductor device, the structure comprising: a substrate of semiconductor material; a dielectric for electrically insulating the substrate, the dielectric having a window therethrough; a feed-through layer of epitaxial semiconductor material confined within the window, a lower surface of the feed-through layer in contact with that portion of the substrate which underlies the window; and a substantially planar continuous subcollector layer of semiconductor material that is physically separated from the substrate by the dielectric, the dielectric comprising an intervening layer between the substrate and the subcollector layer, the subcollector layer including an epitaxial portion distinct from the feed-through layer that overlies the feed-through layer in the window and a polycrystalline portion that overlies the dielectric, an upper surface of the feed-through layer in contact with that portion of the subcollector layer which overlies the window, the epitaxial portion in substantial vertical alignment with the underlying feed-through layer and the polycrystalline portion in substantial vertical alignment with the underlying dielectric.

Claim 9

A semiconductor device comprising a pre-processed substrate structure according to claim 6 and a semiconductor structure on the subcollector layer of the substrate structure, the semiconductor structure including an active region in substantial alignment with the feed-through layer that lies beneath the subcollector layer.

Claim 10

A device according to claim 7 wherein the semiconductor structure comprises a collector layer over the subcollector layer, a base layer over the collector layer, an emitter layer over the base layer, and contact means for establishing electrical connections with the collector, base and emitter layers.

Claim 11

A device according to claim 8 wherein the base layer comprises silicon-germanium.

Claim 12

A structure according to claim 6 and further comprising a second feed-through layer of epitaxial semiconductor material confined within a second window in the dielectric, a lower surface of the second feed-through layer in contact with that portion of the substrate which underlies the second window, an upper surface of the second feed-through layer in contact with that portion of the subcollector layer which overlies the second window, that portion of the subcollector layer which overlies the second feed-through layer comprising epitaxial material.

Claim 13

A structure according to claim 10 and further comprising a channel stop region in the surface of the substrate between the first and second regions thereof, operative to electrically isolate the first and second regions from each other.

Claim 14

A structure according to claim 11 wherein the substrate comprises p type silicon and the channel stop region comprises p + type silicon.

Claim 15

A pre-processed substrate structure for a semiconductor device, the structure comprising: a substrate of semiconductor material; a dielectric for electrically insulating the substrate, the dielectric having a window therethrough; a feed-through layer of epitaxial semiconductor material overfilling the window and extending laterally outward therefrom over a portion of the dielectric layer, a lower surface of the feed-through layer in contact with that portion of the substrate which underlies the window; and a substantially planar continuous subcollector layer of semiconductor material that is physically separated from the substrate by the dielectric, the dielectric comprising an intervening layer between the substrate and the subcollector layer, the subcollector layer including an epitaxial portion distinct from the feed-through layer that overlies the feed-through layer in the window and the lateral extension of the feed-through layer and a polycrystalline portion that overlies the dielectric, an upper surface of the feed-through layer in contact with that portion of the subcollector layer which overlies the window and the lateral extension of the feed-through layer, said upper surface having a larger area than said lower surface, the epitaxial portion of the subcollector layer in substantial vertical alignment with the underlying feed-through layer and the polycrystalline portion in substantial vertical alignment with the underlying dielectric.

Claim 16

A pre-processed substrate structure for a semiconductor device, the structure comprising: a substrate of semiconductor material; a dielectric for electrically insulating the substrate, the dielectric having a window therethrough; a feed-through layer of epitaxial semiconductor material overfilling the window and extending laterally outward therefrom over a portion of the dielectric layer, a lower surface of the feed-through layer in contact with that portion of the substrate which underlies the window; and a substantially planar continuous subcollector layer of semiconductor material that is physically separated from the substrate by the dielectric, the dielectric comprising an intervening layer between the substrate and the subcollector layer, the subcollector layer including an epitaxial portion distinct from the feed-through layer that overlies the feed-through layer in the window and the lateral extension of the feed-through layer and a polycrystalline portion that overlies the dielectric, an upper surface of the feed-through layer in contact with that portion of the subcollector layer which overlies the window and the lateral extension of the feed-through layer, said upper surface having a larger area than said lower surface, the epitaxial portion of the subcollector layer in substantial vertical alignment with the underlying feed-through layer and the polycrystalline portion in substantial vertical alignment with the underlying dielectric.

Claim 17

A semiconductor device comprising a pre-processed substrate structure according to claim 13 and a semiconductor structure on the subcollector layer of the substrate structure, the semiconductor structure including an active region in substantial alignment with the feed-through layer that lies beneath the subcollector layer.

Claim 18

A device according to claim 14 wherein the semiconductor structure comprises a collector layer over the subcollector layer, a base layer over the collector layer, an emitter layer over the base layer, and contact means for establishing electrical connections with the collector, base and emitter layers.

Claim 19

A device according to claim 15 wherein the base layer comprises silicon-germanium.

Claim 20

A structure according to claim 13 and further comprising a second-feedthrough layer of epitaxial semiconductor material in and overfilling a second window in the dielectric and extending laterally outward therefrom between the dielectric layer and the subcollector layer, a lower surface of the second feed-through layer in contact with that portion of the substrate which underlies the second window, an upper surface of the second feed-through layer in contact with that portion of the subcollector layer which overlies the second window and the lateral extension of the second feed-through layer, said upper surface having a larger area than said lower surface, that portion of the subcollector layer which overlies the second feed-through layer comprising epitaxial material.

Claim 21

A structure according to claim 17 and further comprising a channel stop region in the surface of the substrate between the first and second regions thereof, operative to electrically isolate the first and second regions from each other.

Claim 22

A structure according to claim 18 wherein the substrate comprises p type silicon and the channel stop region comprises p + type silicon.