US5250822A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Field effect transistor
Assignee: Mitsubishi Electric Corp
•
Filing: 1992-03-25
•
Granted: 1993-10-05
•
Expires: 2012-03-25
Abstract
Abstract A field effect transistor includes a GaAs substrate on which an undoped GaAs layer is disposed. A doped electron supply layer is disposed on the undoped GaAs layer and has a negligible deep dopant level. A channel layer disposed on the electron supply layer has a larger electron affinity than the electron supply layer. The electron supply layer and the channel layer form a heterojunction. A third semiconductor layer having the same conductivity type as the electron supply layer is disposed on the electron supply layer. Gate, drain, and source electrodes are disposed on the third semiconductor layer. The dopant concentration of the third layer is smaller than the dopant concentration of the electron supply layer.
Inventors
- 👤 Takuji Sonoda
- 👤 Shinichi Sakamoto
- 👤 Nobuyuki Kasai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 21:52
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/4732
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
134 words
A field effect transistor comprising: a heterojunction structure having at least one doped first semiconductor electron supply layer having a first electron affinity, a shallow dopant impurity concentration, and a substantially negligible deep dopant energy level and at least one undoped second semiconductor channel layer having a second electron affinity larger than the first electron affinity contacting and forming a heterojunction with said at least one electron supply layer; a layer of a third semiconductor material contacting one of said at least one electron supply and channel layers and having the same conductivity type as said at least one electron supply layer and a dopant concentration of less than the dopant concentration of said at least one electron supply layer; and gate, drain, and source electrodes in contact with said third semiconductor material layer.
Claim 2
Dependent Claim
134 words
A field effect transistor comprising: a heterojunction structure having at least one doped first semiconductor electron supply layer having a first electron affinity, a shallow dopant impurity concentration, and a substantially negligible deep dopant energy level and at least one undoped second semiconductor channel layer having a second electron affinity larger than the first electron affinity contacting and forming a heterojunction with said at least one electron supply layer; a layer of a third semiconductor material contacting one of said at least one electron supply and channel layers and having the same conductivity type as said at least one electron supply layer and a dopant concentration of less than the dopant concentration of said at least one electron supply layer; and gate, drain, and source electrodes in contact with said third semiconductor material layer.
Claim 3
Dependent Claim
36 words
A field effect transistor according to claim 1 wherein said heterojunction structure comprises one electron supply layer and two channel layers, said two channel layers being respectively disposed on opposite sides of said electron supply layer.
Claim 4
Dependent Claim
44 words
A field effect transistor according to claim 1 wherein said heterojunction structure comprises a plurality of heterojunctions, a plurality of channel layers, and a plurality of electron supply layers, each heterojunction comprising one of said electron supply layers and one of said channel layers.
Claim 5
Dependent Claim
121 words
A field effect transistor comprising: a doped first semiconductor electron supply layer having a first electron affinity, a shallow dopant impurity concentration, and a substantially negligible deep dopant energy level; an undoped second semiconductor channel layer having a second electron affinity larger than the first electron affinity, said channel layer being disposed in contact with said electron supply layer; a layer of a doped third semiconductor material in contact with said electron supply layer opposite said channel layer, said third semiconductor material having the same conductivity type as said electron supply layer and a dopant concentration of less than the dopant concentration of said electron supply layer; and gate, drain, and source electrodes in contact with said third semiconductor material layer.
Claim 6
Dependent Claim
121 words
A field effect transistor comprising: a doped first semiconductor electron supply layer having a first electron affinity, a shallow dopant impurity concentration, and a substantially negligible deep dopant energy level; an undoped second semiconductor channel layer having a second electron affinity larger than the first electron affinity, said channel layer being disposed in contact with said electron supply layer; a layer of a doped third semiconductor material in contact with said electron supply layer opposite said channel layer, said third semiconductor material having the same conductivity type as said electron supply layer and a dopant concentration of less than the dopant concentration of said electron supply layer; and gate, drain, and source electrodes in contact with said third semiconductor material layer.
Claim 7
Dependent Claim
27 words
A field effect transistor according to claim 4 wherein said electron supply layer is GaAs, said channel layer is InGaAs, and said third semiconductor material is GaAs.
Claim 8
Dependent Claim
49 words
A field effect transistor according to claim 5 wherein the dopant concentration of said electron supply layer is about 1.5×10 18 cm -3 and the dopant concentration of said third semiconductor material is within the range from about 0.5×10 17 cm -3 to about 0.8×10 17 cm -3 .
Claim 9
Dependent Claim
27 words
A field effect transistor according to claim 4 wherein said electron supply layer is AlGaAs, said channel layer is InGaAs, and said third semiconductor material is GaAs.
Claim 10
Dependent Claim
39 words
A field effect transistor according to claim 4 wherein said layer of a third semiconductor material is thinner between said gate electrode and said electron supply layer than between said source and drain electrodes and said electron supply layer.
Claim 11
Dependent Claim
46 words
A field effect transistor according to claim 8 wherein said layer of the third semiconductor material between said gate electrode and said electron supply layer is sufficiently thin to be entirely depleted of charge carriers when no gate bias voltage is applied to said gate electrode.
References Cited (Backward Citations)
JPS59124769A
Cited
JPS6086872A
Cited
JPS60193382A
Cited
US4558337A
Cited
US4689115A
Cited
JPS62266874A
Cited
JPS6360570A
Cited
US4827320A
Cited
JPS63155772A
Cited
US4967242A
Cited
US5043777A
Cited
JPH0355851A
Cited
US5038187A
Cited
US5028968A
Cited
US5049951A
Cited
US5140386A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-10-04 | 1997-04-05 | 1997-10-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-10-04 | 2001-04-05 | 2001-10-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-10-04 | 2005-04-05 | 2005-10-05 | $7700.00 | Window Closed / Lapsed |