← Back to Patent Explorer
US5244142A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of mounting semiconductor elements

Assignee: Sumitomo Electric Industries Ltd
•
Filing: 1991-11-19
•
Granted: 1993-09-14
•
Expires: 2011-11-19
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method of mounting a plurality of semiconductor elements each having bump electrodes on a wiring board by pressing the semiconductor elements to the wiring board while aligning the electrodes and heating the structure. In the mounting method, one or more heat sinks are previously joined to the backs opposite to the surfaces with the bump electrodes formed thereon of the semiconductor elements.

Inventors

  • 👤 Masanori Nishiguchi
  • 👤 Atsushi Miki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 05:22
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/071; H10W72/072; H10W72/07221; H10W72/07227; H10W72/07231; H10W72/07236; H10W72/07251; H10W72/20; H10W72/241; H10W72/251; H10W72/252; H10W72/851; H10W72/874; H10W72/877; H10W74/00; H10W80/00; H10W80/161; H10W80/168; H10W90/00; H10W90/701; H10W90/721; H10W90/724; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49146

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 101 words
A method of mounting semiconductor elements comprising the steps of: providing a plurality of semiconductor elements each of said semiconductor elements having first and second surfaces and having bump electrodes on said first surfaces; forming a resist pattern on an undersurface of a heat sink to align said semiconductor elements; joining heat sinks to said second surfaces; pressing said semiconductor elements, with said heat sinks joined thereon to a wiring board having electrodes, while aligning the bump electrodes with said wiring board electrodes; and heating said bump electrodes and said wiring board to mount said semiconductor elements on said wiring board.
Claim 2
Independent Claim 101 words
A method of mounting semiconductor elements comprising the steps of: providing a plurality of semiconductor elements each of said semiconductor elements having first and second surfaces and having bump electrodes on said first surfaces; forming a resist pattern on an undersurface of a heat sink to align said semiconductor elements; joining heat sinks to said second surfaces; pressing said semiconductor elements, with said heat sinks joined thereon to a wiring board having electrodes, while aligning the bump electrodes with said wiring board electrodes; and heating said bump electrodes and said wiring board to mount said semiconductor elements on said wiring board.
Claim 3
Dependent Claim 29 words
The method of claim 1, further comprising the step of applying a holding resin to said wiring board, said semiconductor elements and said heat sinks after said heating step.
Claim 4
Dependent Claim 25 words
The method of claim 1, wherein the step of joining is performed using solder having a melting point lower than that of the bump electrodes.
Claim 5
Dependent Claim 16 words
The method of claim 1, wherein said wiring board electrodes are formed in a concave shape.
Claim 6
Dependent Claim 16 words
The method of claim 1, wherein said wiring board electrodes are formed in a convex shape.

References Cited (Backward Citations)

US4292647A Cited
JPS5965458A Cited
FR2555812A1 Cited
US4770242A Cited
US4604644A Cited
US4825284A Cited
US5024264A Cited
JPS63252432A Cited
EP0344702A2 Cited
US5005638A Cited
US5001548A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-09-13 1997-03-15 1997-09-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-09-13 2001-03-15 2001-09-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-09-13 2005-03-15 2005-09-14 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag