Patent US5240883A successfully refreshed from Google Patents.
US5240883A
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US
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Method of fabricating soi substrate with uniform thin silicon film
Assignee: Shin-Etsu Handotai Co Ltd
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Filing: 1992-02-25
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Granted: 1993-08-31
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Expires: 2012-02-25
Abstract
Abstract A thin Silicon film On Insulator (SOI) material fabricating method which is capable of providing a very high thickness uniformity of the silicon film, a process simplification and a considerable reduction of processing cost is disclosed, in which a silicon oxide film is formed on one or both of a p-type silicon bond wafer and a silicon base wafer, then the two wafers are bonded together through the silicon oxide film, subsequently a fixed positive charge is induced in the silicon oxide film to form a n-type inversion layer in the p-type silicon bond wafer adjacent to an interface between the p-type silicon bond wafer and the silicon oxide film layer, and thereafter a chemical etching is effected while applying a positive voltage to the p-type silicon bond wafer so that an etch-stop is made at an interface between a depletion layer including the n-type inversion layer and the p-type layer.
Inventors
- 👤 Takao Abe
- 👤 Masatake Katayama
- 👤 Akio Kanai
- 👤 Konomu Ohki
- 👤 Masatake Nakano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 19:05
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1914; H10P50/00; H10P50/60; H10P50/61; H10P50/613; H10W; H10W10/00; H10W10/10; H10W10/181; Y; Y10; Y10S; Y10S148/00; Y10S148/127; Y10S148/135; Y10S438/00; Y10S438/914; Y10S438/924
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
149 words
A method of fabricating a thin silicon film on insulator material, comprising the steps of: providing a p-type silicon bond wafer and a silicon base wafer; forming a silicon oxide film on at least one of said p-type silicon bond wafer and said silicon base wafer; bonding said p-type silicon bond wafer and said silicon base wafer through said silicon oxide film to form a composite wafer structure; inducing a fixed positive charge in said silicon oxide film to form a n-type inversion layer in said p-type silicon bond wafer adjacent to an interface between said p-type silicon bond wafer and said silicon oxide film; and thereafter, performing a chemical etching of a composite wafer structure while applying a positive voltage to said p-type silicon bond wafer so that an etch-stop is made at an interface between a depletion layer including said n-type inversion layer and said p-type layer.
Claim 2
Independent Claim
149 words
A method of fabricating a thin silicon film on insulator material, comprising the steps of: providing a p-type silicon bond wafer and a silicon base wafer; forming a silicon oxide film on at least one of said p-type silicon bond wafer and said silicon base wafer; bonding said p-type silicon bond wafer and said silicon base wafer through said silicon oxide film to form a composite wafer structure; inducing a fixed positive charge in said silicon oxide film to form a n-type inversion layer in said p-type silicon bond wafer adjacent to an interface between said p-type silicon bond wafer and said silicon oxide film; and thereafter, performing a chemical etching of a composite wafer structure while applying a positive voltage to said p-type silicon bond wafer so that an etch-stop is made at an interface between a depletion layer including said n-type inversion layer and said p-type layer.
Claim 3
Dependent Claim
22 words
A method according to claim 1, wherein said fixed positive charge is induced by exposing said composite wafer structure to X-ray radiation.
Claim 4
Dependent Claim
19 words
A method according to claim 1, wherein said silicon oxide film is formed on said p-type silicon bond wafer.
Claim 5
Dependent Claim
50 words
A method according to claim 1, wherein said silicon oxide film is formed by heat-treating at least one of said silicon wafer at about 1050° C. for 4 hours in an H 2 /O 2 atmosphere and then taken out at about 800° C. in a dry O 2 atmosphere.
Claim 6
Dependent Claim
32 words
A method according to claim 1, wherein said positive voltage applied to said p-type silicon bond wafer is in the range of from 0.3 to 5 V, and preferably about 1.2 V.
Claim 7
Dependent Claim
31 words
A method according to claim 1, further including heat-treating said composite wafer structure at a temperature above 1000° C. after said chemical etching is effected, thereby annihilating said fixed positive charge.
Claim 8
Independent Claim
133 words
A method of fabricating a thin silicon film on insulator material, comprising the steps of: providing a p-type silicon bond wafer and a silicon base wafer; forming, on at least one of said p-type silicon bond wafer and said silicon base wafer, a silicon oxide film having a large amount of fixed positive charge; bonding said p-type silicon bond wafer and said silicon base wafer through said silicon oxide film while heating said wafers at a temperature ranging from 200° to 900° C., thereby forming a composite wafer structure; and thereafter, performing a chemical etching of said composite wafer structure while applying a positive voltage to said p-type silicon bond wafer so that an etch-stop is made at an interface between a depletion layer including said n-type inversion layer and said p-type layer.
Claim 9
Independent Claim
133 words
A method of fabricating a thin silicon film on insulator material, comprising the steps of: providing a p-type silicon bond wafer and a silicon base wafer; forming, on at least one of said p-type silicon bond wafer and said silicon base wafer, a silicon oxide film having a large amount of fixed positive charge; bonding said p-type silicon bond wafer and said silicon base wafer through said silicon oxide film while heating said wafers at a temperature ranging from 200° to 900° C., thereby forming a composite wafer structure; and thereafter, performing a chemical etching of said composite wafer structure while applying a positive voltage to said p-type silicon bond wafer so that an etch-stop is made at an interface between a depletion layer including said n-type inversion layer and said p-type layer.
Claim 10
Dependent Claim
19 words
A method according to claim 7, wherein said silicon oxide film is formed on said p-type silicon bond wafer.
Claim 11
Dependent Claim
50 words
A method according to claim 7, wherein said silicon oxide film is formed by heat-treating at least one of said silicon wafers at about 1050° C. for 4 hours in an H 2 /O 2 atmosphere and then taken out at about 800° C. in a dry O 2 atmosphere.
Claim 12
Dependent Claim
32 words
A method according to claim 7, wherein said positive voltage applied to said p-type silicon bond wafer is in the range of from 0.3 to 5 V, and preferably about 1.2 V.
Claim 13
Dependent Claim
34 words
A method according to claim 1, further including heat-treating said composite wafer structure at a temperature above 1000° C. after said chemical etching is effected, thereby reducing the amount of said fixed positive charge.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1996-08-30 | 1997-03-01 | 1997-08-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-30 | 2001-03-01 | 2001-08-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-30 | 2005-03-01 | 2005-08-31 | $7700.00 | Window Closed / Lapsed |