US5237669A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Memory management method
Assignee: Gen Digital Inc
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Filing: 1991-07-15
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Granted: 1993-08-17
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Expires: 2011-07-15
Abstract
Abstract A method of increasing the amount of directly addressable memory address locations that can be allocated to Random Access Memory (RAM). An initialization routine is executed to identify Read Only Memory (ROM's) in reserved memory address space that are to be reallocated. Suitable address space in extended memory is located and the ROM's are mapped into extended memory address space. A ROM access interceptor routine is implemented to trap ROM accesses and direct them to the reallocated address space. A ROM access handler routine is implemented to contain the ROM execution and to restore the computer system to a condition where it can continue execution of application or system software after the ROM access is completed Memory addresses in reserved address space formerly allocated to ROM's can be reallocated to RAM or other memory devices.
Inventors
- 👤 Dan Spear
- 👤 Larry Mayer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 08:22
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/14; G06F12/1458; G06F12/1491; G06F12/02; G06F12/0223; G06F12/0292
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
179 words
In a computer system having a processor capable of operating in a real and a protected mode, and having a first range of memory addresses reserved for Read Only Memory (ROM's) and additional memory addresses designated as conventional memory and extended memory, a method of utilizing said first range of memory addresses, by said processor, to access other memory devices comprising the steps of: identifying addresses of said ROM's in said first range of memory addresses; identifying interrupt handles for accessing said ROM's; identifying addresses of any data table stored in said ROM; allocating said ROM's to a second range of addresses outside of said first range and said conventional memory and mapping said ROM's to said second range of memory addresses; copying said ROM data table into said conventional memory; allocating address space in said conventional memory for said interrupt handlers; copying said interrupt handlers into the allocated address space; providing the interrupt handlers with selectors that point to said ROM data table in said conventional memory; overlaying said ROM addresses in said first range with extended memory.
Claim 2
Dependent Claim
179 words
In a computer system having a processor capable of operating in a real and a protected mode, and having a first range of memory addresses reserved for Read Only Memory (ROM's) and additional memory addresses designated as conventional memory and extended memory, a method of utilizing said first range of memory addresses, by said processor, to access other memory devices comprising the steps of: identifying addresses of said ROM's in said first range of memory addresses; identifying interrupt handles for accessing said ROM's; identifying addresses of any data table stored in said ROM; allocating said ROM's to a second range of addresses outside of said first range and said conventional memory and mapping said ROM's to said second range of memory addresses; copying said ROM data table into said conventional memory; allocating address space in said conventional memory for said interrupt handlers; copying said interrupt handlers into the allocated address space; providing the interrupt handlers with selectors that point to said ROM data table in said conventional memory; overlaying said ROM addresses in said first range with extended memory.
Claim 3
Dependent Claim
25 words
The method of claim 1 further including the steps of: creating global and local descriptor tables for said ROM's in said second range of addresses.
Claim 4
Dependent Claim
98 words
The method of claim 1 further including the step of: placing said processor into said protected mode at a first protection level; setting a return address onto a stack of said protected mode; changing a Code Segment:Instruction Pointer (CS:IP) to point to relocated ROM entry point; placing said processor at a second protection level of said protected mode; executing said ROM access; returning control to said return address; changing said CS:IP to a caller return address; examining output of said execution of said ROM access and modifying said output if necessary; placing said processor into said real mode.
Claim 5
Dependent Claim
177 words
In a computer system having a processor capable of operating in a real and a protected mode, and having a first range of memory addresses reserved for Read Only Memory (ROM's) and additional memory addresses designated as conventional memory and extended memory, a method of utilizing said first range of memory addresses, by said processor, to access other memory devices comprising the steps of: identifying addresses of said ROM's in said first range of memory addresses; identifying interrupt handlers for addressing said ROM's; identifying addresses of any data table in said ROM; allocating real mode address space for an Expanded Memory Specification (EMS) page frame in which ROM's will execute; copying said ROM data table into conventional memory; allocating address space in said conventional memory for said interrupt handlers; placing said interrupt handlers in an interrupt table in said allocated address space; modifying pointers in said interrupt handlers to said ROM data table to point to copies of said ROM data table in said conventional memory; overlaying said ROM addresses in said first range with extended memory.
Claim 6
Dependent Claim
177 words
In a computer system having a processor capable of operating in a real and a protected mode, and having a first range of memory addresses reserved for Read Only Memory (ROM's) and additional memory addresses designated as conventional memory and extended memory, a method of utilizing said first range of memory addresses, by said processor, to access other memory devices comprising the steps of: identifying addresses of said ROM's in said first range of memory addresses; identifying interrupt handlers for addressing said ROM's; identifying addresses of any data table in said ROM; allocating real mode address space for an Expanded Memory Specification (EMS) page frame in which ROM's will execute; copying said ROM data table into conventional memory; allocating address space in said conventional memory for said interrupt handlers; placing said interrupt handlers in an interrupt table in said allocated address space; modifying pointers in said interrupt handlers to said ROM data table to point to copies of said ROM data table in said conventional memory; overlaying said ROM addresses in said first range with extended memory.
Claim 7
Dependent Claim
113 words
The method of claim 4 further including the steps of: placing said processor into said protected mode at a first protection level; saving the current mapping of said EMS page frame; setting a return address onto a stack of said real mode; changing a Code Segment:Instruction Pointer (CS:IP) to point to an entry point of a relocated ROM; placing said processor into said real mode; executing code in said ROM; returning control to said return address; changing said CS:IP to a caller return address; examining output of said execution of said ROM access and modifying said output if necessary; restoring original mapping of said page frame; placing said processor into said real mode.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-08-16 | 1997-02-15 | 1997-08-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-16 | 2001-02-15 | 2001-08-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-16 | 2005-02-15 | 2005-08-17 | $7700.00 | Window Closed / Lapsed |