Software emulation of bank-switched memory using a virtual DOS monitor and paged memory management

Claim 1

A method of operating a computer system, the computer system including a CPU having an address range of greater than 1-Mbyte, a memory having a continuous physical address range of greater than 1-Mbyte, and addressing means connecting said CPU to said memory, comprising the steps of: (a) addressing said memory by said CPU alternatively in: a first address mode wherein addresses generated in said CPU are directly used as the physical addresses to access said memory, or a second address mode wherein addresses generated within said CPU are translated using table entries to physical addresses used to access said memory; (b) executing an operating system for said CPU stored in said memory using either said first address mode or said second address mode, said operating system defining a user memory area of 0-to-640 Kbyte and a system memory area of 640 Kbyte to 1-Mbyte, said operating system further defining a protocol permitting said CPU to respond to a bank-switched memory access command generated within said CPU by addressing a bank-switched memory system; and (c) in response to a said bank-switched memory access command, accessing an extended memory portion of said memory having a continuous physical address range of greater than 1-Mbyte while executing said operating system, said extended memory portion having physical addresses above 1-Mbyte, by operating said addressing means in said second address mode and employing a plurality of said table entries of said addressing means selectively mapped to an expanded memory page frame within said system memory area to access said extended memory portion.

Claim 2

A method of operating a computer system, the computer system including a CPU having an address range of greater than 1-Mbyte, a memory having a continuous physical address range of greater than 1-Mbyte, and addressing means connecting said CPU to said memory, comprising the steps of: (a) addressing said memory by said CPU alternatively in: a first address mode wherein addresses generated in said CPU are directly used as the physical addresses to access said memory, or a second address mode wherein addresses generated within said CPU are translated using table entries to physical addresses used to access said memory; (b) executing an operating system for said CPU stored in said memory using either said first address mode or said second address mode, said operating system defining a user memory area of 0-to-640 Kbyte and a system memory area of 640 Kbyte to 1-Mbyte, said operating system further defining a protocol permitting said CPU to respond to a bank-switched memory access command generated within said CPU by addressing a bank-switched memory system; and (c) in response to a said bank-switched memory access command, accessing an extended memory portion of said memory having a continuous physical address range of greater than 1-Mbyte while executing said operating system, said extended memory portion having physical addresses above 1-Mbyte, by operating said addressing means in said second address mode and employing a plurality of said table entries of said addressing means selectively mapped to an expanded memory page frame within said system memory area to access said extended memory portion.

Claim 16

A method of emulating expanded memory using a CPU having an address range of greater than 1-Mbyte, a memory having a continuous physical address range of greater than 1-Mbyte, and using an addressing means connecting said CPU to said memory, comprising the steps of: (a) executing an operating system on said CPU defining separate user memory and system memory areas within a range of greater than 1-Mbyte; (b) addressing said memory by said CPU in an address mode wherein virtual addresses generated within said CPU are translated to physical addresses used to access said memory using page table entries; (c) and accessing an extended memory portion of said memory while executing said operating system, said extended memory portion having physical addresses above the address range of 1-Mbyte, employing a plurality of said table entries of said addressing means selectively mapping parts of said extended memory portion to an expanded memory page frame within said system memory area.

Claim 17

A method of emulating expanded memory using a CPU having an address range of greater than 1-Mbyte, a memory having a continuous physical address range of greater than 1-Mbyte, and using an addressing means connecting said CPU to said memory, comprising the steps of: (a) executing an operating system on said CPU defining separate user memory and system memory areas within a range of greater than 1-Mbyte; (b) addressing said memory by said CPU in an address mode wherein virtual addresses generated within said CPU are translated to physical addresses used to access said memory using page table entries; (c) and accessing an extended memory portion of said memory while executing said operating system, said extended memory portion having physical addresses above the address range of 1-Mbyte, employing a plurality of said table entries of said addressing means selectively mapping parts of said extended memory portion to an expanded memory page frame within said system memory area.

Claim 24

A method of operating a computer system of the type having a real mode of operation and a virtual mode of operation, and having a plurality of levels of protection, comprising the steps of: (a) executing a task in said virtual mode at a predefined level of protection; (b) while executing said task, detecting a hardware interrupt and interrupting said task by saving the current state of said task in a stack at a level of greater protection than said predefined level; (c) then executing an interrupt handler at said level of greater protection to create a new stack to simulate an interrupt in said real mode, the new stack containing the entry conditions for a virtual mode interrupt handler; (d) returning to virtual mode and executing a virtual mode interrupt handler using said new stack to provide the same entry conditions as if the interrupt had been in real mode.

Claim 25

A method of operating a computer system of the type having a real mode of operation and a virtual mode of operation, and having a plurality of levels of protection, comprising the steps of: (a) executing a task in said virtual mode at a predefined level of protection; (b) while executing said task, detecting a hardware interrupt and interrupting said task by saving the current state of said task in a stack at a level of greater protection than said predefined level; (c) then executing an interrupt handler at said level of greater protection to create a new stack to simulate an interrupt in said real mode, the new stack containing the entry conditions for a virtual mode interrupt handler; (d) returning to virtual mode and executing a virtual mode interrupt handler using said new stack to provide the same entry conditions as if the interrupt had been in real mode.

Claim 28

A method of operating a computer system of the type having a real mode of operation and a virtual mode of operation, and having a plurality of levels of protection in said virtual mode, comprising the steps of: (a) executing a task in said virtual mode at one of said levels of protection; (b) while executing said task, detecting a software interrupt and interrupting said task by entering a fault routine and saving the current state of said task in a stack at a higher level of protection than said one level; (c) then executing an interrupt handler selected by decoding the instruction causing said software interrupt, at said higher level of protection, to create a new stack to simulate an interrupt in said real mode, the new stack containing the entry conditions for a virtual mode interrupt handler; (d) returning to virtual mode and executing a virtual mode interrupt handler using said stack to provide the same entry conditions as if the interrupt had been in real mode.

Claim 29

A method of operating a computer system of the type having a real mode of operation and a virtual mode of operation, and having a plurality of levels of protection in said virtual mode, comprising the steps of: (a) executing a task in said virtual mode at one of said levels of protection; (b) while executing said task, detecting a software interrupt and interrupting said task by entering a fault routine and saving the current state of said task in a stack at a higher level of protection than said one level; (c) then executing an interrupt handler selected by decoding the instruction causing said software interrupt, at said higher level of protection, to create a new stack to simulate an interrupt in said real mode, the new stack containing the entry conditions for a virtual mode interrupt handler; (d) returning to virtual mode and executing a virtual mode interrupt handler using said stack to provide the same entry conditions as if the interrupt had been in real mode.

Claim 38

A method of operating an MS-DOS computer system having a memory address space and an extended-memory address space, wherein said extended memory address space is the address space outside the memory address space which MS-DOS system can access, said method comprising the steps of: (a) detecting an instruction to access an expanded memory address space; (b) accessing said extended memory address space in lieu of carrying out said instruction.

Claim 39

A method of operating an MS-DOS computer system having a memory address space and an extended-memory address space, wherein said extended memory address space is the address space outside the memory address space which MS-DOS system can access, said method comprising the steps of: (a) detecting an instruction to access an expanded memory address space; (b) accessing said extended memory address space in lieu of carrying out said instruction.