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US5221858A Expired / Lapsed US ⏱️ 0.0 years remaining

Tape automated bonding (TAB) semiconductor device with ground plane and method for making the same

Assignee: Motorola Solutions Inc
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Filing: 1992-02-14
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Granted: 1993-06-22
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Expires: 2012-02-14
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Abstract

Abstract A TAB semiconductor device (10) has a ground plane which is electrically coupled to ground leads without traditional conductive vias. Instead of using vias, a ground plane (34) has a plurality of ground leads (36) embossed on a surface of the ground plane in a first TAB leadframe (14), thereby forming one monolithic ground plane assembly. The ground leads are shaped to form inner lead portions (46) and outer lead portions (48) which are bonded to a semiconductor die (38) and a substrate (not illustrated), respectively. A second TAB leadframe (12) forms signal leads (16). The two leadframes are superimposed with each other to form a composite, multilayered TAB leadframe structure. Improved electrical and physical continuity between the ground leads and the ground plane help to lower lead inductance.

Inventors

  • 👤 Leo M. Higgins, III

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 20:21
CPC Classifications
H; H10; H10W; H10W72/00; H10W70/00; H10W70/40; H10W70/453; H10W72/071; H10W72/072; H10W72/07251; H10W72/20

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 201 words
A semiconductor device comprising: a semiconductor die having a plurality of reference voltage pads and a plurality of signal pads formed on a surface thereof; and a multilayer leadframe structure comprising: a first conductive layer which forms a plurality of signal leads, the plurality of signal leads being electrically coupled to the plurality of signal pads on the die; a second conductive layer separated from the first conductive layer which forms a reference voltage plane having a plurality of reference voltage leads embossed on a surface thereof, each of the reference voltage leads having an inner lead portion and a central lead portion, wherein the inner lead portion of each reference voltage lead is contiguous with, and thinner than, a corresponding central lead portion of each reference voltage lead and each inner lead portion is electrically coupled to one of the plurality of reference voltage pads on the die, and wherein the central lead portion of each reference voltage lead is contiguous with the reference voltage plane and has a thickness sufficient to make the inner lead portion of each reference voltage lead substantially coplanar with the signal leads; and a dielectric separating portions of the first and second conductive layers.
Claim 2
Dependent Claim 201 words
A semiconductor device comprising: a semiconductor die having a plurality of reference voltage pads and a plurality of signal pads formed on a surface thereof; and a multilayer leadframe structure comprising: a first conductive layer which forms a plurality of signal leads, the plurality of signal leads being electrically coupled to the plurality of signal pads on the die; a second conductive layer separated from the first conductive layer which forms a reference voltage plane having a plurality of reference voltage leads embossed on a surface thereof, each of the reference voltage leads having an inner lead portion and a central lead portion, wherein the inner lead portion of each reference voltage lead is contiguous with, and thinner than, a corresponding central lead portion of each reference voltage lead and each inner lead portion is electrically coupled to one of the plurality of reference voltage pads on the die, and wherein the central lead portion of each reference voltage lead is contiguous with the reference voltage plane and has a thickness sufficient to make the inner lead portion of each reference voltage lead substantially coplanar with the signal leads; and a dielectric separating portions of the first and second conductive layers.
Claim 3
Dependent Claim 23 words
The semiconductor device of claim 1 wherein the reference voltage plane of the second conductive layer is annular and encircles the semiconductor die.
Claim 4
Dependent Claim 25 words
The semiconductor device of claim 1 wherein the reference voltage plane is a ground plane and the plurality of reference voltage leads are ground leads.
Claim 5
Dependent Claim 15 words
The semiconductor device of claim 1 wherein the multilayer leadframe is a TAB leadframe structure.
Claim 6
Dependent Claim 54 words
The semiconductor device of claim 4 wherein the TAB leadframe structure comprises a first TAB leadframe which forms the plurality of signal leads and a second TAB leadframe which forms the reference voltage plane and the plurality of reference voltage leads, and wherein the first TAB leadframe is superimposed with the second TAB leadframe.
Claim 7
Dependent Claim 13 words
The semiconductor device of claim 1 wherein the dielectric is an adhesive material.
Claim 8
Dependent Claim 26 words
The semiconductor device of claim 1 wherein the reference voltage leads of and the signal leads of the device are at least partially separated by air.
Claim 9
Dependent Claim 38 words
The semiconductor device of claim 1 wherein the reference voltage leads of and the signal leads of the device are at least partially separated by an adhesive material having a dielectric constant less than or equal to 3.5.
Claim 10
Dependent Claim 259 words
A tape automated bonding (TAB) semiconductor device comprising: a first TAB leadframe having a ground plane formed of a continuous conductive film and a plurality of ground leads embossed on a surface of the ground plane such that the ground plane and ground leads form a monolithic structure, each ground lead having an inner lead portion, a central lead portion, and an outer lead portion, wherein the inner and outer lead portions of each ground lead are contiguous to opposing sides of the central lead portion, wherein the central lead portion of each ground lead is contiguous with the ground plane, and wherein the central portion of each ground lead has a thickness sufficient to elevate the inner and outer lead portions of the ground leads away from the ground plane; a second TAB leadframe having a plurality of signal leads, the second TAB leadframe being superimposed with the first TAB leadframe such that the inner and outer lead portions of the ground leads of the first TAB leadframe and the signal leads of the second TAB leadframe lie substantially in a common plane; a dielectric separating portions of the first and second TAB leadframes such that the first and second TAB leadframes are electrically isolated from each other; and a semiconductor die having a first plurality of bond pads which are electrically coupled to the inner lead portions of the ground leads of the first TAB leadframe and having a second plurality of bond pads which are electrically coupled to the signal leads of the second TAB leadframe.
Claim 11
Dependent Claim 259 words
A tape automated bonding (TAB) semiconductor device comprising: a first TAB leadframe having a ground plane formed of a continuous conductive film and a plurality of ground leads embossed on a surface of the ground plane such that the ground plane and ground leads form a monolithic structure, each ground lead having an inner lead portion, a central lead portion, and an outer lead portion, wherein the inner and outer lead portions of each ground lead are contiguous to opposing sides of the central lead portion, wherein the central lead portion of each ground lead is contiguous with the ground plane, and wherein the central portion of each ground lead has a thickness sufficient to elevate the inner and outer lead portions of the ground leads away from the ground plane; a second TAB leadframe having a plurality of signal leads, the second TAB leadframe being superimposed with the first TAB leadframe such that the inner and outer lead portions of the ground leads of the first TAB leadframe and the signal leads of the second TAB leadframe lie substantially in a common plane; a dielectric separating portions of the first and second TAB leadframes such that the first and second TAB leadframes are electrically isolated from each other; and a semiconductor die having a first plurality of bond pads which are electrically coupled to the inner lead portions of the ground leads of the first TAB leadframe and having a second plurality of bond pads which are electrically coupled to the signal leads of the second TAB leadframe.
Claim 12
Dependent Claim 37 words
The semiconductor device of claim 9 wherein the inner and outer lead portions of the ground leads lie in a plane which is different from, and substantially parallel to, the ground plane of the first TAB leadframe.
Claim 13
Dependent Claim 28 words
The semiconductor device of claim 10 wherein the inner and outer lead portions of each ground lead are substantially thinner than the central portion of each ground lead.
Claim 14
Dependent Claim 34 words
The semiconductor device of claim 11 wherein each signal lead has a predetermined thickness and wherein the inner and outer lead portions of each ground lead have thicknesses approximately equal to the predetermined thickness.
Claim 15
Dependent Claim 11 words
The semiconductor device of claim 9 wherein the dielectric is air.
Claim 16
Dependent Claim 28 words
The semiconductor device of claim 9 wherein the dielectric is an adhesive material having a dielectric constant (ε r ) which is less than or equal to 3.5.

References Cited (Backward Citations)

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US5036380A Cited
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US5099306A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-06-21 1996-12-21 1997-06-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-06-21 2000-12-21 2001-06-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-06-21 2004-12-21 2005-06-22 $7700.00 Window Closed / Lapsed

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