Patent US5220196A successfully refreshed from Google Patents.
US5220196A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Mitsubishi Electric Corp
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Filing: 1991-11-04
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Granted: 1993-06-15
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Expires: 2011-11-04
Abstract
Abstract A semiconductor device includes an insulating substrate; a semiconductor chip on which plural electrodes including at least one ground electrode and at least one power source electrode are disposed; plural leads supported by an obverse surface of the insulating substrate, the plural leads being connected to corresponding electrodes on the semiconductor chip; at least one grounding conductor plate on a reverse surface of the insulating substrate; and at least one power source conductor plate on the reverse surface of the insulating substrate. This semiconductor device includes grounding contact holes for electrically connecting the grounding conductor plate to a ground lead coupled to the ground electrode on the semiconductor chip; power source contact holes for electrically connecting the power source conductor plate to a power source lead coupled to the power source electrode on the semiconductor chip; and a package body encapsulating the semiconductor chip and an end of each of the leads so that the other end of each of the leads is exposed outside the package body.
Inventors
- 👤 Kazunari Michii
- 👤 Haruo Shimamoto
- 👤 Masataka Takehara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:40
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/701; H10W70/00; H10W70/40; H10W70/453; H10W70/60; H10W70/62; H10W70/65
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
281 words
A semiconductor device comprising: an insulating substrate having obverse and reverse surfaces and a central opening; a semiconductor chip disposed in the central opening, said semiconductor chip having an obverse surface and a plurality of electrodes disposed on said observse surface, said electrode including at least one ground electrode and at least one power source electrode; a plurality of leads disposed on and supported by said obverse surface of said insulating substrate, said plurality of leads being connected to corresponding electrodes on said said semiconductor chip, said leads including at least one grounding lead connected to said at least one ground electrode and at least one power source lead connected to said at least one power source electrode; at least one grounding conductor plate disposed on and directly contacting said reverse surface of said insulating substrate, said at least one grounding conductor plate having an area; at least one power source conductor plate disposed on and directly contacting said reverse surface of said insulating substrate electrically insulated from said at least one grounding conductor plate, said at least one power source conductor plate having an area, wherein the areas of said at least one grounding conductor plate and said at least one power source conductor plate are substantially equal to each other; first connecting means electrically connecting said at least one grounding conductor plate to said at least one ground lead; second connecting means electrically connecting said at least one power source conductor plate to said at least one power source lead; and a package body encapsulating said semiconductor chip and parts of said plurality of leads with parts of each of said plurality of leads exposed outside said package body.
Claim 2
Dependent Claim
281 words
A semiconductor device comprising: an insulating substrate having obverse and reverse surfaces and a central opening; a semiconductor chip disposed in the central opening, said semiconductor chip having an obverse surface and a plurality of electrodes disposed on said observse surface, said electrode including at least one ground electrode and at least one power source electrode; a plurality of leads disposed on and supported by said obverse surface of said insulating substrate, said plurality of leads being connected to corresponding electrodes on said said semiconductor chip, said leads including at least one grounding lead connected to said at least one ground electrode and at least one power source lead connected to said at least one power source electrode; at least one grounding conductor plate disposed on and directly contacting said reverse surface of said insulating substrate, said at least one grounding conductor plate having an area; at least one power source conductor plate disposed on and directly contacting said reverse surface of said insulating substrate electrically insulated from said at least one grounding conductor plate, said at least one power source conductor plate having an area, wherein the areas of said at least one grounding conductor plate and said at least one power source conductor plate are substantially equal to each other; first connecting means electrically connecting said at least one grounding conductor plate to said at least one ground lead; second connecting means electrically connecting said at least one power source conductor plate to said at least one power source lead; and a package body encapsulating said semiconductor chip and parts of said plurality of leads with parts of each of said plurality of leads exposed outside said package body.
Claim 3
Dependent Claim
22 words
A semiconductor device as claimed in claim 1 wherein said first connecting means includes grounding contact holes provided in said insulating substrate.
Claim 4
Dependent Claim
22 words
A semiconductor device as claimed in claim 1 wherein said second connecting means includes power source contact holes in said insulating substrate.
Claim 5
Dependent Claim
17 words
A semiconductor device as claimed in claim 1 wherein said plurality leads of includes several hundred leads.
Claim 6
Dependent Claim
16 words
A semiconductor device as claimed in claim 1 wherein said insulating substrate is a polyimide tape.
Claim 7
Dependent Claim
67 words
A semiconductor device as claimed in claim 1 wherein the central opening is rectangular and has four edges and including two grounding conductor plates and two power source conductor plates, said grounding conductor plates being spaced from each other and from said power source conductor plates, each of said grounding conductor plates and said power source conductor plates being disposed adjacent a corresponding edge of the opening.
Claim 8
Dependent Claim
25 words
A semiconductor device as claimed in claim 6 wherein said grounding conductor plates and power source conductor plates are alternatingly disposed around the central opening.
Claim 9
Dependent Claim
23 words
A semiconductor device as claimed in claim 6 wherein said gorunding conductor plates and power source conductor plates are generally trapezoidal in shape.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-06-14 | 1996-12-14 | 1997-06-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-06-14 | 2000-12-14 | 2001-06-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-06-14 | 2004-12-14 | 2005-06-15 | $7700.00 | Window Closed / Lapsed |