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US5189588A Expired / Lapsed US ⏱️ 0.0 years remaining

Surge protection apparatus

Assignee: Panasonic Holdings Corp
•
Filing: 1990-03-15
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Granted: 1993-02-23
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Expires: 2010-03-15
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Abstract

Abstract A surge protection apparatus, has a signal terminal, and first and second power supply terminals which are connected to the internal circuit to be protected, and first and second diodes which are connected between the signal terminal and the first and second power supply terminals, and a protective transistor acting as a discharge path for the surge voltage which is connected between the first and the second power supply terminals. As a result, even if the discharge capability of the internal circuit connected between the first and second power supply terminals is small, the surge voltage can be discharged in a short time through the protective transistor. Moreover, since the protective diode at the positive power supply side is connected to the power source of low impedance, the plural signal terminals will not be coupled by the junction capacitance. Thus, crosstalk does not occur between the plural signal terminals.

Inventors

  • 👤 Shigeru Yano
  • 👤 Masao Takiguchi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 16:24
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 129 words
A surge protection apparatus for protecting an internal circuit composed of MOS semiconductor elements comprising: a signal terminal, a first power supply terminal and second power supply terminal connected to the internal circuit; a first diode having an anode which is connected to said signal terminal and having a cathode which is connected to said first power supply terminal; a second diode having a cathode which is connected to said signal terminal and having an anode which is connected to said second power supply terminal; and a protective MOS transistor having a drain electrode which is connected to said first power supply terminal, and having a source electrode which is connected to said second power supply terminal and having a gate electrode which is connected to said source electrode.
Claim 2
Dependent Claim 129 words
A surge protection apparatus for protecting an internal circuit composed of MOS semiconductor elements comprising: a signal terminal, a first power supply terminal and second power supply terminal connected to the internal circuit; a first diode having an anode which is connected to said signal terminal and having a cathode which is connected to said first power supply terminal; a second diode having a cathode which is connected to said signal terminal and having an anode which is connected to said second power supply terminal; and a protective MOS transistor having a drain electrode which is connected to said first power supply terminal, and having a source electrode which is connected to said second power supply terminal and having a gate electrode which is connected to said source electrode.
Claim 3
Dependent Claim 135 words
A surge protection apparatus for protecting an internal circuit formed in a semiconductor chip comprising: plural signal input/output pads and power supply pads formed in a peripheral region of the semiconductor chip; first and second power supply wires connected to said power supply pads and disposed mutually adjacent to each other on the semiconductor chip; a means for respectively connecting said plural signal input/output pads and said first and second power supply wires to the internal circuit; plural first and second diodes, each of said first and second diodes respectively connected between said signal input/output pads and said first and second power supply wires; and plural protective transistors connected between said first and second power supply wires and disposed sporadically at plural positions along a longitudinal direction of said first and second power supply wires.
Claim 4
Dependent Claim 135 words
A surge protection apparatus for protecting an internal circuit formed in a semiconductor chip comprising: plural signal input/output pads and power supply pads formed in a peripheral region of the semiconductor chip; first and second power supply wires connected to said power supply pads and disposed mutually adjacent to each other on the semiconductor chip; a means for respectively connecting said plural signal input/output pads and said first and second power supply wires to the internal circuit; plural first and second diodes, each of said first and second diodes respectively connected between said signal input/output pads and said first and second power supply wires; and plural protective transistors connected between said first and second power supply wires and disposed sporadically at plural positions along a longitudinal direction of said first and second power supply wires.
Claim 5
Dependent Claim 27 words
A surge protection apparatus as recited in claim 2, wherein said protective transistor is formed in the semiconductor substrate beneath said first or second power supply wire.

References Cited (Backward Citations)

US3777216A Cited
US4066918A Cited
US4423431A Cited
GB2090701A Cited
US4630162A Cited
US4736271A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-02-23 1996-08-24 1997-02-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-02-23 2000-08-24 2001-02-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-02-23 2004-08-24 2005-02-23 $7700.00 Window Closed / Lapsed

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