Patent US5175491A successfully refreshed from Google Patents.
US5175491A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated circuit testing fixture
Assignee: STMicroelectronics lnc USA
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Filing: 1991-09-18
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Granted: 1992-12-29
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Expires: 2011-09-18
Abstract
Abstract A test fixture is provided for simultaneously performing burn-in and testing of multiple integrated circuit devices. The packaged integrated circuits rest on electrical contacts without sockets. A top plate of the fixture holds all of the devices in place. The use of a compressible material allows for variations in package size, lead length, and socket wear while still maintaining good electrical connection. Leads are connected through the test substrate to the backside and the devices may be connected in parallel or otherwise as desired.
Inventors
- 👤 Charles R. Ewers
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 21:27
CPC Classifications
G; G01; G01R; G01R1/00; G01R1/02; G01R1/04; G01R1/0408; G01R1/0433; H; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/325
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
85 words
An integrated circuit test fixture, comprising: a substrate; a compressible pad layer on said substrate; a plurality of conductive test leads on said pad layer, wherein said leads are bent to extend through holes in said pad and said substrate; a non-conductive spacer over said pad layer, said spacer having a plurality of openings to accept each lead of an integrated circuit; and a fixture cover, said cover spaced to press leads of integrated circuit devices against the test leads when said cover is closed.
Claim 2
Dependent Claim
85 words
An integrated circuit test fixture, comprising: a substrate; a compressible pad layer on said substrate; a plurality of conductive test leads on said pad layer, wherein said leads are bent to extend through holes in said pad and said substrate; a non-conductive spacer over said pad layer, said spacer having a plurality of openings to accept each lead of an integrated circuit; and a fixture cover, said cover spaced to press leads of integrated circuit devices against the test leads when said cover is closed.
Claim 3
Dependent Claim
26 words
The test fixture of claim 1, wherein said test leads define a plurality of possible device positions suitable for receiving a plurality of integrated circuit devices.
Claim 4
Dependent Claim
16 words
The test fixture of claim 2, wherein the spacer openings are aligned with said test leads.
Claim 5
Dependent Claim
31 words
The test fixture of claim 1, further comprising: a plurality of conductive traces on said substrate connected to said test leads to provide electrical power and signals to integrated circuit devices.
Claim 6
Dependent Claim
24 words
The test fixture of claim 4, further comprising: a plurality of connections connected to said conductive traces for contacting electrical power and signal sources.
Claim 7
Dependent Claim
17 words
The test fixture of claim 1, wherein the openings in said spacer are adapted to accept J-leads.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-12-29 | 1996-06-29 | 1996-12-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-12-29 | 2000-06-29 | 2000-12-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-12-29 | 2004-06-29 | 2004-12-29 | $7700.00 | Window Closed / Lapsed |