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US5159338A
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Sampling frequency conversion apparatus
Assignee: Toshiba Corp
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Filing: 1991-11-29
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Granted: 1992-10-27
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Expires: 2011-11-29
Abstract
Abstract A sampling frequency conversion apparatus according to this invention converts an input data string based on an input sampling pulse into a data string based on an output sampling pulse having a frequency different from the frequency of the input sampling pulse. The apparatus reproduces the input sampling pulse based on the input data string, generates interpolation sampling pulses having a frequency corresponding to an integral multiple of the frequency of the input sampling pulse, and generates an interpolated data string from the input data string on the basis of the interpolation sampling pulses. On the other hand, the apparatus phase-modulates the output sampling pulse to diffuse its frequency spectrum, and selects and determines a timing of the interpolation sampling pulse closest to the timing of the phase-modulated output sampling pulse. The apparatus selects data corresponding to the selected timing from the interpolated data string, and outputs the selected data.
Inventors
- 👤 Yasuo Takahashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 21:49
CPC Classifications
H; H03; H03H; H03H17/00; H03H17/02; H03H17/06; H03H17/0621; H03H17/0628; H03H17/0635; H03H17/065; H03H17/0657
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
173 words
A sampling frequency conversion apparatus for converting an input data string based on an input sampling pulse into a data string based on an output sampling pulse having a frequency different from a frequency of the input sampling pulse, and outputting the converted data string, comprising: an interpolation sampling pulse generation circuit for reproducing the input sampling pulse from the input data string, and generating interpolation sampling pulses having a frequency corresponding to an integral multiple of the frequency of the input sampling pulse; a data interpolation circuit for fetching the input data string, and generating an interpolated data string based on the interpolation sampling pulses; a timing selection circuit for selecting one of a plurality of timings of the interpolation sampling pulses before or after an input timing of the output sampling pulse; a data selection circuit for selecting an output data, corresponding to the timing selected by said timing selection circuit, from the interpolated data string; and selection control means for randomly changing a selection reference of said timing selection circuit.
Claim 2
Dependent Claim
173 words
A sampling frequency conversion apparatus for converting an input data string based on an input sampling pulse into a data string based on an output sampling pulse having a frequency different from a frequency of the input sampling pulse, and outputting the converted data string, comprising: an interpolation sampling pulse generation circuit for reproducing the input sampling pulse from the input data string, and generating interpolation sampling pulses having a frequency corresponding to an integral multiple of the frequency of the input sampling pulse; a data interpolation circuit for fetching the input data string, and generating an interpolated data string based on the interpolation sampling pulses; a timing selection circuit for selecting one of a plurality of timings of the interpolation sampling pulses before or after an input timing of the output sampling pulse; a data selection circuit for selecting an output data, corresponding to the timing selected by said timing selection circuit, from the interpolated data string; and selection control means for randomly changing a selection reference of said timing selection circuit.
Claim 3
Dependent Claim
79 words
An apparatus according to claim 1, wherein said timing selection circuit comprises a phase modulation circuit for phase-modulating the output sampling pulse, and selects a timing of the interpolation sampling pulses closest to the input timing of the output sampling pulse phase-modulated by said phase modulation circuit; and said selection control means comprises a noise signal generation circuit for supplying a noise signal to said phase modulation circuit, and the output sampling pulse is phase-modulated by the noise signal.
Claim 4
Dependent Claim
82 words
An apparatus according to claim 1, wherein said timing selection circuit comprises a phase modulation circuit for phase-modulating the output sampling pulse, and selects a timing of the interpolation sampling pulses closest to the input timing of the output sampling pulse phase-modulated by said phase modulation circuit; and said selection control means comprises a pseudo random signal generation circuit for supplying a pseudo random signal to said phase modulation circuit, and the output sampling pulse is phase-modulated by the pseudo random signal.
Claim 5
Dependent Claim
95 words
An apparatus according to claim 1, wherein said timing selection circuit comprises reference timing setting means for setting a reference timing between the interpolation sampling pulses, and comparison means for comparing the input timing of the output sampling pulse and the reference timing, and selects one of the plurality of the interpolation sampling pulse before or after the timing of the output sampling pulse based on a comparison result of said comparison means; and said selection control means comprises timing control means for randomly changing the reference timing set by said reference timing setting means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-10-27 | 1996-04-27 | 1996-10-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-10-27 | 2000-04-27 | 2000-10-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-10-27 | 2004-04-27 | 2004-10-27 | $7700.00 | Window Closed / Lapsed |