US5155846A
Expired / Lapsed
US
⏱️ 0.0 years remaining
System monitoring replies to continuously transmitted signal and discontinuing signal to force reset of remote system using watchdog timer
Assignee: Toshiba Corp
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Filing: 1988-11-25
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Granted: 1992-10-13
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Expires: 2008-11-25
Abstract
Abstract In a communication control system for transmission of a serial signal between a receiver controller with a microcomputer and a transmitter controller with a microcomputer, if an abnormal condition such as overrun of the receiver microcomputer occurs, or when necessary, a unit within the transmitter controller prevents transmission of control data signals for a predetermined period, and a unit within the receiver controller resets the receiver microcomputer after it has detected that control data signals from the transmitter controller have not been received for a predetermined period.
Inventors
- 👤 Yoshihito Mino
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 23:37
CPC Classifications
H; H04; H04L; H04L7/00; H04L5/00; H04L5/14; H04L5/1415; G; G08; G08C; G08C25/00; H04L13/00
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
158 words
A system, comprising: a transmitter controller for remotely controlling a controlled system, comprising: a first microcomputer for continuously generating a control data signal; means for transmitting said control data signal to a remote receiver controller; and means for forcibly preventing transmission of the control data signal from the transmitter controller for a predetermined time to force resetting of a second microcomputer in the receiver controller; a remote receiver controller for directly controlling said controlled system, comprising: said second microcomputer for receiving the control data signal and controlling the controlled system in accordance with the control data signal; and reset means for generating a reset signal if the control data signal from the transmitter controller has not been received for a predetermined period, and resetting the second microcomputer in response to the reset signal; and a communication path for transferring the control data signal in the form of a serial signal between the transmitter controller and the receiver controller.
Claim 2
Independent Claim
158 words
A system, comprising: a transmitter controller for remotely controlling a controlled system, comprising: a first microcomputer for continuously generating a control data signal; means for transmitting said control data signal to a remote receiver controller; and means for forcibly preventing transmission of the control data signal from the transmitter controller for a predetermined time to force resetting of a second microcomputer in the receiver controller; a remote receiver controller for directly controlling said controlled system, comprising: said second microcomputer for receiving the control data signal and controlling the controlled system in accordance with the control data signal; and reset means for generating a reset signal if the control data signal from the transmitter controller has not been received for a predetermined period, and resetting the second microcomputer in response to the reset signal; and a communication path for transferring the control data signal in the form of a serial signal between the transmitter controller and the receiver controller.
Claim 3
Dependent Claim
28 words
A system according to claim 1, wherein said control data signal transmission preventing means comprises a switch which stops the operation of a control data signal transmission transistor.
Claim 4
Dependent Claim
59 words
A system according to claim 1, wherein said reset means comprises a capacitor and reset signal generating means, said capacitor being charged by a DC power source having a predetermined voltage while said receiver controller receives the control data signal, and being discharged at a predetermined time constant while said receiver controller does not receive the control data signal.
Claim 5
Dependent Claim
38 words
A system according to claim 3, wherein said reset signal generating means comprises a Zener diode which is turned on when the voltage of said capacitor lowers to a predetermined value to drive a reset signal generating transistor.
Claim 6
Dependent Claim
21 words
A system according to claim 1, comprising a shunt capacitor connected to a reset signal input terminal of said receiver microcomputer.
Claim 7
Dependent Claim
51 words
A system according to claim 1, further comprising an AND gate and a watchdog timer connected between the output of said AND gate and a reset signal input terminal of said receiver microcomputer, said AND gate being input with a watchdog pulse from said receiver microcomputer and with said reset signal.
Claim 8
Independent Claim
199 words
A system, comprising: a transmitter controller for remotely controlling a controlled system, comprising: a first microcomputer for continuously generating a control data signal; means for transmitting said control data signal to a remote receiver controller; means for receiving a reply signal from the receiver controller and generating a reset request signal if the reply signal indicates an abnormal state; and means for forcibly preventing transmission of the control data signal from the transmitter controller for a predetermined time in response to the reset request signal; a remote receiver controller for directly controlling said controlled system, comprising: a second microcomputer for receiving the control data signal and controlling the controlled system in accordance with the control data signal; means for transmitting a reply signal to the transmitter controller when the control data signal has been received; and reset means for generating a reset signal if the control data signal from the transmitter controller has not been received for a predetermined period, and resetting the second microcomputer in response to the reset signal; and a communication path for transferring the control data signal and the reply signal in the form of serial signals between the transmitter controller and the receiver controller.
Claim 9
Independent Claim
199 words
A system, comprising: a transmitter controller for remotely controlling a controlled system, comprising: a first microcomputer for continuously generating a control data signal; means for transmitting said control data signal to a remote receiver controller; means for receiving a reply signal from the receiver controller and generating a reset request signal if the reply signal indicates an abnormal state; and means for forcibly preventing transmission of the control data signal from the transmitter controller for a predetermined time in response to the reset request signal; a remote receiver controller for directly controlling said controlled system, comprising: a second microcomputer for receiving the control data signal and controlling the controlled system in accordance with the control data signal; means for transmitting a reply signal to the transmitter controller when the control data signal has been received; and reset means for generating a reset signal if the control data signal from the transmitter controller has not been received for a predetermined period, and resetting the second microcomputer in response to the reset signal; and a communication path for transferring the control data signal and the reply signal in the form of serial signals between the transmitter controller and the receiver controller.
Claim 10
Dependent Claim
28 words
A system according to claim 7, wherein said control data signal transmission preventing means comprises a switch which stops the operation of a control data signal transmission transistor.
Claim 11
Dependent Claim
61 words
A communication control system according to claim 7, wherein said reset means comprises a capacitor and reset signal generating means, said capacitor being charged by a DC power source having a predetermined voltage while said receiver controller receives the control data signal, and being discharged at a predetermined time constant while said receiver controller does not receive the control data signal.
Claim 12
Dependent Claim
38 words
A system according to claim 9, wherein said reset signal generating means comprises a Zener diode which is turned on when the voltage of said capacitor lowers to a predetermined value to drive a reset signal generating transistor.
Claim 13
Dependent Claim
21 words
A system according to claim 7, comprising a shunt capacitor connected to a reset signal input terminal of said receiver microcomputer.
Claim 14
Dependent Claim
51 words
A system according to claim 7, further comprising an AND gate and a watchdog timer connected between the output of said AND gate and a reset signal input terminal of said receiver microcomputer, said AND gate being input with a watchdog pulse from said receiver microcomputer and with said reset signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-10-13 | 1996-04-13 | 1996-10-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-10-13 | 2000-04-13 | 2000-10-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-10-13 | 2004-04-13 | 2004-10-13 | $7700.00 | Window Closed / Lapsed |