High resolution analogue-to-digital converter

Claim 1

An analog-to-digital converter, having an analog voltage input and a digital output, comprising: a charge balancing differential integrator, comprising a differential amplifier and an integrator capacitor, said differential amplifier having a non-inverting input serving as said analog voltage input of the analog-to-digital converter, said integrator capacitor connected between an inverting input of the differential amplifier and a voltage output of said differential amplifier and an integrator resistor connected to the inverting input of said differential amplifier, the other end of said integrator resistor forming a negative input of the differential integrator, another capacitor connected between a noninverting input of the differential amplifier and ground and another resistor connected between the analog voltage input and the noninverting input of the differential amplifier; pulse width modulator means, having a signal input, a clock input and an output, for outputting a pulse width modulated signal at each of its cycles of operation, said pulse width output at each said cycle having a period fixed by a system cycle clock signal input onto said clock input, said pulse width modulated signal having a quantized pulse width indicative of said voltage output of said differential amplifier received on said signal input and quantized to one of a defined plurality of values which gives the best possible charge balancing in said integrator capacitor, wherein said pulse width modulator means comprises a periodic ramp signal generator, a voltage of a periodic ramp signal output from the periodic ramp signal generator being compared with said voltage output of the differential amplifier a predetermined number of times during each said period of the pulse width modulated signal; means for feeding back said pulse-width modulated signal to said inverting input of said differential amplifier; said charge balancing differential integrator producing a residual charge indicative of a difference between said quantized pulse width and perfect charge balance over plural cycles of said pulse width modulator means, until said residual charge accumulates sufficiently over said plural cycles to cause said pulse width modulator means to generate another quantized pulse width based on adjustment by said residual charge; and a digital encoding means for monitoring a plurality of outputs of said pulse width modulator means over a plurality of said cycles for producing and outputting a digital value onto said digital output of the analog-to-digital converter which is indicative of both a) said pulse width of said pulse width modulated signal and b) the frequency of occurrence of said quantized pulse width and said another quantized pulse width, over said plurality of cycles.