Clock-controlled voltage-to-frequency converter

Claim 2

A clock-controlled voltage-to-frequency converter comprising a reference voltage source, an integrator for receiving said reference voltage and a variable input voltage and producing an output having a triangular waveform, said integrator including a capacitor which is charged at a rate proportional to the magnitude of the input voltage and discharged at a rate proportional to the difference between said reference voltage and said input voltage, said charging and discharging occurring during a time interval T o , said discharging occurring during a time interval T p , a clock pulse source for generating a continuous series of clock pulses, counting means responsive to said clock pulses for terminating the discharging of said capacitor and initiating the charging of said capacitor at a fixed time interval following termination of the charging of said capacitor, whereby said discharging interval T p is maintained at a constant level while said charging and discharging interval T o is varied in accordance with the magnitude of said input voltage, logic means responsive to the output of said integrator for terminating the charging of said capacitor and initiating the discharging of said capacitor when said integrator output rises above a preselected threshold level, the time required for said capacitor to charge to said threshold level varying in accordance with the magnitude of said input voltage, and means for generating an output signal comprising a series of pulses having a pulse width corresponding to said constant discharging interval T p and a frequency which is a linear function of said input voltage.

Claim 3

A clock-controlled voltage-to-frequency converter as set forth in claim 1 wherein said logic means includes a set-reset flip flop which receives the output of said integrator and is set when the integrator output voltage increases to a predetermined threshold level.

Claim 4

A clock-controlled voltage-to-frequency converter as set forth in claim 2 wherein said logic means also includes a D flip flop clocked by said clock pulses and receiving at its D input the output of said set-reset flip flop, whereby the output of said D flip flop changes state in response to the first clock pulse following the setting of said set-reset flip flop.

Claim 5

A clock-controlled voltage-to-frequency converter as set forth in claim 3 wherein said counting means comprises a timer receiving said clock pulses and the output of said D flip flop so that the timer starts counting clock pulses when the output of said D flip flop changes state in response to the first clock pulse following the setting of said set-reset flip flop, and then counts a predetermined number of clock pulses, said timer producing a binary output which changes state upon completion of the counting of said predetermined number of clock pulses; and said set-reset flip flop receives said binary output of said timer and is reset when said binary output changes state upon completion of said counting, whereby the output of said D flip flop changes state in response to the first clock pulse following the resetting of said set-reset flip flop.

Claim 6

A clock-controlled voltage-to-frequency converter comprising a reference voltage source, an integrator for receiving said reference voltage and a variable input voltage and producing an output having a triangular waveform, said integrator including a capacitor which is charged at a rate proportional to the magnitude of the input voltage and discharged at a rate proportional to the difference between said reference voltage and said input voltage, said charging and discharging occurring during a time interval T o , said discharging occurring during a time interval T p , a clock pulse source for generating a continuous series of clock pulses, means for terminating the charging of said capacitor and initiating the discharging of said capacitor in response to the first clock pulse following the charging of said capacitor to a preselected threshold level, counting means receiving said clock pulses and producing a binary control signal which changes state in response to the counting of a preselected number of clock pulses following termination of the charging of said capacitor, means for terminating the discharging of said capacitor and initiating the charging of said capacitor in response to the first clock pulse following the first change in the state of said control signal after termination of the charging of said capacitor, whereby said discharging interval T p is maintained at a constant level while said charging and discharging interval T o is varied in accordance with the magnitude of said input voltage, and means responsive to said binary control signal for generating an output signal comprising a series of pulses having a pulse width corresponding to said constant discharging interval T p and a frequency which is a linear function of said input voltage.

Claim 7

A clock-controlled voltage-to-frequency converter comprising a reference voltage source, an integrator for receiving said reference voltage and a variable input voltage and producing an output having a triangular waveform, said integrator including a capacitor which is charged at a rate proportional to the magnitude of the input voltage and discharged at a rate proportional to the difference between said reference voltage and said input voltage, said charging and discharging occurring during a time interval T o , said discharging occurring during a time interval T p , a clock pulse source for generating a continuous series of clock pulses, means for terminating the charging of said capacitor and initiating the discharging of said capacitor in response to the first clock pulse following the charging of said capacitor to a preselected threshold level, counting means receiving said clock pulses and producing a binary control signal which changes state in response to the counting of a preselected number of clock pulses following termination of the charging of said capacitor, means for terminating the discharging of said capacitor and initiating the charging of said capacitor in response to the first clock pulse following the first change in the state of said control signal after termination of the charging of said capacitor, whereby said discharging interval T p is maintained at a constant level while said charging and discharging interval T o is varied in accordance with the magnitude of said input voltage, and means responsive to said binary control signal for generating an output signal comprising a series of pulses having a pulse width corresponding to said constant discharging interval T p and a frequency which is a linear function of said input voltage.

Claim 8

A clock-controlled, voltage-to-frequency converter as set forth in claim 5 wherein said preselected threshold level is the switching point of a set-reset flip flop.