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US5139961A Expired / Lapsed US ⏱️ 0.0 years remaining

Reducing base resistance of a bjt by forming a self aligned silicide in the single crystal region of the extrinsic base

Assignee: National Semiconductor Corp
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Filing: 1990-04-02
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Granted: 1992-08-18
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Expires: 2010-04-02
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Abstract

Abstract A high performance bipolar transistor and a method of fabrication. Base resistance is reduced by a self-aligned silicide formed in the single-crystal region of the extrinsic base, thereby eliminating the polysilicon to single-crystal contact resistance as well as shunting the resistance of the single-crystal extrinsic base region. Oxide from the sidewall of the polysilicon local interconnection is selectively removed prior to silicide formation. Therefore, selected sidewalls of the poly interconnect layer also becomes silicided. This results in significant reductions in resistance of the interconnection, particularly for sub-micron geometries. Improved techniques for forming field oxide regions and for forming base regions of bipolar transistors are also disclosed.

Inventors

  • 👤 Alan G. Solheim
  • 👤 Bamdad Bastani
  • 👤 James L. Bouknight
  • 👤 George E. Ganschow
  • 👤 Bancherd DeLong
  • 👤 Rajeeva Lahri
  • 👤 Steve M. Leibiger
  • 👤 Christopher S. Blair
  • 👤 Rick C. Jerome
  • 👤 Madan Biswal
  • 👤 Tad Davies
  • 👤 Vida Ilderem
  • 👤 Ali A. Iranmanesh

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 10:59
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/052; H10P; H10P95/00; H10D10/054; H10D10/40; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P14/00; H10P14/60; H10P14/61; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/10; H10W10/13; Y; Y10; Y10S; Y10S148/00; Y10S148/01

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 106 words
A method of forming a base region for a bipolar transistor comprising the steps of: (a) providing a single-crystal region on a substrate, said single-crystal region comprising a first conductivity type; b) forming a polycrystalline region on said single-crystal region, at least portions of said polycrystalline region doped with a dopant of a second conductivity type; c) diffusing said dopant of a second conductivity type into said single-crystal region to form said base region in said single-crystal region; d) implanting an emitter contact region of said polycrystalline region with dopants of said first conductivity type; and e) etching said polycrystalline region to form said emitter contact.
Claim 2
Independent Claim 106 words
A method of forming a base region for a bipolar transistor comprising the steps of: (a) providing a single-crystal region on a substrate, said single-crystal region comprising a first conductivity type; b) forming a polycrystalline region on said single-crystal region, at least portions of said polycrystalline region doped with a dopant of a second conductivity type; c) diffusing said dopant of a second conductivity type into said single-crystal region to form said base region in said single-crystal region; d) implanting an emitter contact region of said polycrystalline region with dopants of said first conductivity type; and e) etching said polycrystalline region to form said emitter contact.
Claim 3
Dependent Claim 24 words
The method as recited in claim 1 wherein said single-crystal region is an epitaxial silicon region and said polycrystalline region is a polysilicon region.
Claim 4
Dependent Claim 37 words
The method as recited in claim 1 further comprising the step of doping a second portion of said polycrystalline region with a dopant of said first conductivity type, said portion forming an emitter of said bipolar transistor.
Claim 5
Dependent Claim 51 words
The method as recited in claim 3 wherein the step of doping said polycrystalline region is a step of doping substantially all of said polycrystalline with said dopant of said second conductivity type and wherein said step of forming an emitter region compensates said polycrystalline silicon to said first conductivity type.
Claim 6
Dependent Claim 36 words
The method as recited in claim 3 further comprising the step of doping a second region of said polycrystalline regions to a second conductivity type, said second region forming a base contact of said bipolar transistor.
Claim 7
Dependent Claim 37 words
The method as recited in claim 3 further comprising the step of doping third regions of said polycrystalline region with a dopant of said first conductivity type, said third regions comprising collector contacts of said bipolar transistor.
Claim 8
Dependent Claim 22 words
The method as recited in claim 1 wherein said step of doping said polycrystalline region simultaneously forms lightly doped regions of resistors.
Claim 9
Dependent Claim 41 words
The method as recited in claim 1 wherein said steps of doping said polycrystalline region with a dopant of a second conductivity type provides a net dopant concentration in said single-crystal region of less than about 1×10 18 /cm 3 .
Claim 10
Dependent Claim 21 words
The method as recited in claim 1 wherein a junction depth of said bipolar transistor is less than about 0.25 μm.
Claim 11
Dependent Claim 40 words
The method as recited in claim 1 further comprising the step of implanting a dopant of said second conductivity type, said step of implanting forming a low resistance region in said base, said low resistance region aligned with said emitter.
Claim 12
Dependent Claim 45 words
The method as recited in claim 1 further comprising the steps of masking and etching said polycrystalline region to define said emitter, said etching step etching through said polycrystalline and into said single-crystal region to a depth greater than a junction depth of said emitter.
Claim 13
Independent Claim 399 words
A method of fabricating a bipolar transistor having emitter, base, and collector regions comprising the steps of: a) on a silicon substrate having a first surface, implanting dopants of a first conductivity type in a first region, said first region forming a portion of said collector; b) forming an epitaxial silicon layer on said first surface, said epitaxial layer doped to said first conductivity type; c) forming a first oxide layer on said epitaxial layer; d) forming a first nitride layer on said first oxide layer; e) masking said first nitride layer to define said base and collector sink regions; f) etching said epitaxial layer in regions not protected by said mask on said first nitride layer to form recesses in said epitaxial layer having substantially horizontal surfaces and sidewalls; g) removing said mask on said first nitride layer; h) forming a second oxide layer on said substrate; i) forming a second nitride layer on said second oxide layer and a third nitride layer on said second nitride layer; j) without a mask, etching said oxide and nitride layers to remove oxide and second nitride from said horizontal surfaces, but not said sidewalls and said base and collector region; k) oxidizing said horizontal surfaces to form field oxide regions; l) heavily doping said sink with dopants of said first conductivity type; m) forming a polysilicon layer on said substrate; n) implanting dopants of a second conductivity type into said polysilicon layer; o) diffusing said dopants of said second conductivity type into said base region; p) implanting dopants of said first conductivity type into at least a portion of said polysilicon region over said base region to form an emitter contact region of said first conductivity type; q) etching said polysilicon region to form said emitter contact, base contacts, and a sink contact; r) implanting dopants of said second conductivity type so as to increase a dopant concentration in said base region between said emitter and said base contacts; s) forming oxide on sidewalls of said emitter contact; t) forming metal silicide on exposed regions of silicon along an upper surface of said device, said metal silicide extending along an upper surface of said base region up to said oxide sidewalls; u) forming an oxide layer having contact apertures on said device; v) filling said apertures with tungsten; and w) forming an aluminum silicon contact layer on said oxide layer.
Claim 14
Independent Claim 399 words
A method of fabricating a bipolar transistor having emitter, base, and collector regions comprising the steps of: a) on a silicon substrate having a first surface, implanting dopants of a first conductivity type in a first region, said first region forming a portion of said collector; b) forming an epitaxial silicon layer on said first surface, said epitaxial layer doped to said first conductivity type; c) forming a first oxide layer on said epitaxial layer; d) forming a first nitride layer on said first oxide layer; e) masking said first nitride layer to define said base and collector sink regions; f) etching said epitaxial layer in regions not protected by said mask on said first nitride layer to form recesses in said epitaxial layer having substantially horizontal surfaces and sidewalls; g) removing said mask on said first nitride layer; h) forming a second oxide layer on said substrate; i) forming a second nitride layer on said second oxide layer and a third nitride layer on said second nitride layer; j) without a mask, etching said oxide and nitride layers to remove oxide and second nitride from said horizontal surfaces, but not said sidewalls and said base and collector region; k) oxidizing said horizontal surfaces to form field oxide regions; l) heavily doping said sink with dopants of said first conductivity type; m) forming a polysilicon layer on said substrate; n) implanting dopants of a second conductivity type into said polysilicon layer; o) diffusing said dopants of said second conductivity type into said base region; p) implanting dopants of said first conductivity type into at least a portion of said polysilicon region over said base region to form an emitter contact region of said first conductivity type; q) etching said polysilicon region to form said emitter contact, base contacts, and a sink contact; r) implanting dopants of said second conductivity type so as to increase a dopant concentration in said base region between said emitter and said base contacts; s) forming oxide on sidewalls of said emitter contact; t) forming metal silicide on exposed regions of silicon along an upper surface of said device, said metal silicide extending along an upper surface of said base region up to said oxide sidewalls; u) forming an oxide layer having contact apertures on said device; v) filling said apertures with tungsten; and w) forming an aluminum silicon contact layer on said oxide layer.
Claim 15
Independent Claim 120 words
A method of forming a base region for a bipolar transistor comprising the steps of: a) providing a single-crystal region bounded by field oxide regions on a substrate, said single-crystal region having a first conductivity type, wherein said single crystal region and said field oxide regions define an active region; b) forming a polycrystalline region on said active region, said polycrystalline region covering substantially all of said active region, at least portions of said polycrystalline region being doped with a dopant of a second conductivity type; and c) diffusing said dopant of a second conductivity type into said active region to form said base region in said single-crystal region, wherein said diffusion occurs across substantially all of said active region.
Claim 16
Independent Claim 120 words
A method of forming a base region for a bipolar transistor comprising the steps of: a) providing a single-crystal region bounded by field oxide regions on a substrate, said single-crystal region having a first conductivity type, wherein said single crystal region and said field oxide regions define an active region; b) forming a polycrystalline region on said active region, said polycrystalline region covering substantially all of said active region, at least portions of said polycrystalline region being doped with a dopant of a second conductivity type; and c) diffusing said dopant of a second conductivity type into said active region to form said base region in said single-crystal region, wherein said diffusion occurs across substantially all of said active region.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-08-18 1996-02-17 1996-08-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-08-18 2000-02-17 2000-08-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-08-18 2004-02-17 2004-08-18 $7700.00 Window Closed / Lapsed

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