US5138439A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Mitsubishi Electric Corp
•
Filing: 1991-03-15
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Granted: 1992-08-11
•
Expires: 2011-03-15
Abstract
Abstract A semiconductor device includes a successively disposed a radiating electrode and hard radiating layer at the rear surface of a semiconductor wafer substrate which is divided into a plurality of semiconductor chips wherein the semiconductor chip includes the hard radiating layer having outer dimensions larger than that of substrate of said semiconductor chip.
Inventors
- 👤 Michihiro Kobiki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 11:52
CPC Classifications
H; H10; H10W; H10W40/00; H10W40/10; H10W40/20; H10W40/25; H10W40/258; H10W72/00; H10W72/01; H10W72/013; H10W72/01331
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
133 words
A semiconductor device comprising: a semiconductor substrate having front and rear surfaces, and a grounding radiating electrode and an insulating radiating layer successively disposed on the rear surface of said substrate; and a carrier to which said semiconductor substrate is mounted with solder, said carrier including a recess, said insulating radiating layer and said ground radiating electrode being disposed within said recess of said carrier, said solder being disposed in the recess contacting said carrier, said grounding radiating electrode, and insulating radiating layer, said solder separating said grounding radiating electrode and said insulating radiating layer from said carrier and electrically connecting said grounding radiating electrode to said carrier wherein a via hole penetrates said semiconductor substrate and extends to said grounding radiating electrode, electrically connecting said semiconductor substrate with said grounding radiating electrode.
Claim 2
Dependent Claim
133 words
A semiconductor device comprising: a semiconductor substrate having front and rear surfaces, and a grounding radiating electrode and an insulating radiating layer successively disposed on the rear surface of said substrate; and a carrier to which said semiconductor substrate is mounted with solder, said carrier including a recess, said insulating radiating layer and said ground radiating electrode being disposed within said recess of said carrier, said solder being disposed in the recess contacting said carrier, said grounding radiating electrode, and insulating radiating layer, said solder separating said grounding radiating electrode and said insulating radiating layer from said carrier and electrically connecting said grounding radiating electrode to said carrier wherein a via hole penetrates said semiconductor substrate and extends to said grounding radiating electrode, electrically connecting said semiconductor substrate with said grounding radiating electrode.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-08-11 | 1996-02-10 | 1996-08-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-08-11 | 2000-02-10 | 2000-08-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-08-11 | 2004-02-10 | 2004-08-11 | $7700.00 | Window Closed / Lapsed |