External clock unit for a computer

Claim 1

A computer system comprising: a. a DEC 8000 series computer, said DEC 8000 series computer including: i. a CPU, ii. a clock module for outputting a clock signal to said CPU, said clock module including a multiplexor having an A input, a B input and a control signal input, iii. a 133 MHZ internal clock coupled to said A input in said multiplexor in said clock module, and iv. a backplane, said backplane having a first pin connected to said B input in said multiplexor in said clock module and a second pin connected to said control signal input in said multiplexor in said clock module, said first and second pins normally being used only for test purposes during fabrication of the clock module to apply a variable clock signal and an external clock enable signal to said multiplexor in said clock module, b. an external clock unit operating independent of said CPU, said external clock unit comprising: i. a 160.2 MHZ crystal oscillator for generating a first external clock signal, ii. a 157.53 MHZ crystal oscillator for generating a second external clock signal, iii. a multiplexor for receiving said first external clock signal and said second external clock signal and outputting one of said first and second external clock signals, iv. a first line driver coupled between said multiplexor in said external clock unit and said first pin in said backplane for driving said one of said external clock signals outputted by said multiplexor in said external clock unit to said first pin in said backplane, v. means coupled to said second pin in said backplane for providing an external clock enable signal to said multiplexor in said clock module, said means including a manually operable switch for turning on and off said external clock enable signal and a second line driver for driving said external clock enable signal, vi. first and second pairs of jumper pins coupled to said multiplexor in said external clock unit for setting which external clock signal is outputted by said multiplexor in said external clock unit, and vii. power supply means for providing power to said 160.2 MHZ crystal oscillator, said 157.53 MHZ crystal oscillator, said multiplexor in said external clock unit and said first and second line drivers.