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US5124570A Expired / Lapsed US ⏱️ 0.0 years remaining

Output control circuit

Assignee: Texas Instruments Inc
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Filing: 1990-09-07
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Granted: 1992-06-23
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Expires: 2010-09-07
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Abstract

Abstract An output control circuit in which the rise and fall times of the output (slew rate) can be properly set respectively, because an electric charge control circuit part is provided to charge or discharge the electric charge to a control electrode of a second switching element at the rise or fall time of the output, and because each operation of the electric charge control circuit part corresponding to the rise and fall of the output is performed independently of the other.

Inventors

  • 👤 Fumio Meno
  • 👤 Michiroh Kobayashi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 17:51
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/003; H03K19/00346; H03K19/00353

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 301 words
A line driver integrated circuit having an output signal control of the maximum time rate change of the output voltage providing a relatively small slew rate independent of the characteristics of the electronic components of the line driver circuit, said line driver circuit comprising: means for receiving an input signal having a magnitude varying from a "low" level to a "high" level, said input signal-receiving means including a first switching element; output means operably connected to said input signal-receiving means and including a second switching element having a control electrode; an electric charge control circuit interposed between said first switching element of said input signal-receiving means and said second switching element of said ouput means and respectively electrically connected thereto for alternately charging and discharging electric charge to and from said control electrode of said second switching element in response to the rise and fall of the signal as output from said first switching element, said electric charge control circuit comprising: a first current mirror circuit for supplying a constant current, a second current mirror circuit connected to the output of the first current mirror circuit, first and second control transistors connected to said first switching element and respectively operably connected to said first and second current mirror circuits; and an electronic component interposed between said first and second current mirror circuits and connected to the control electrode of said second switching element to prevent the control electrode of said second switching element from passing current to said first control transistor when said first control transistor is rendered conductive from the signal as output from said first switching element; and the respective operations of the electric charge control circuit corresponding to the rise and fall of the signal as output from said first switching element being performable independently of each other.
Claim 2
Dependent Claim 301 words
A line driver integrated circuit having an output signal control of the maximum time rate change of the output voltage providing a relatively small slew rate independent of the characteristics of the electronic components of the line driver circuit, said line driver circuit comprising: means for receiving an input signal having a magnitude varying from a "low" level to a "high" level, said input signal-receiving means including a first switching element; output means operably connected to said input signal-receiving means and including a second switching element having a control electrode; an electric charge control circuit interposed between said first switching element of said input signal-receiving means and said second switching element of said ouput means and respectively electrically connected thereto for alternately charging and discharging electric charge to and from said control electrode of said second switching element in response to the rise and fall of the signal as output from said first switching element, said electric charge control circuit comprising: a first current mirror circuit for supplying a constant current, a second current mirror circuit connected to the output of the first current mirror circuit, first and second control transistors connected to said first switching element and respectively operably connected to said first and second current mirror circuits; and an electronic component interposed between said first and second current mirror circuits and connected to the control electrode of said second switching element to prevent the control electrode of said second switching element from passing current to said first control transistor when said first control transistor is rendered conductive from the signal as output from said first switching element; and the respective operations of the electric charge control circuit corresponding to the rise and fall of the signal as output from said first switching element being performable independently of each other.
Claim 3
Dependent Claim 19 words
A line driver integrated circuit as set forth in claim 1, wherein said electronic component is a Schottky diode.
Claim 4
Dependent Claim 85 words
A line driver integrated circuit as set forth in claim 1, wherein said first current mirror circuit of said electric charge control circuit comprises a first plurality of bipolar transistors connected to a power supply; said second current mirror circuit of said electric charge control circuit comprises a second plurality of bipolar transistors connected to ground; and the output of one of said second plurality of bipolar transistors of said second current mirror circuit being connected to the control electrode of said second switching element.
Claim 5
Dependent Claim 26 words
A line driver integrated circuit as set forth in claim 3, wherein said first and second switching elements are respectively first and second bipolar switching transistors.
Claim 6
Dependent Claim 31 words
A line driver integrated circuit as set forth in claim 4, wherein said first bipolar switching transistor is a PNP transistor and said second bipolar switching transistor is an NPN transistor.
Claim 7
Dependent Claim 31 words
A line driver integrated circuit as set forth in claim 4, wherein said second bipolar switching transistor is provided with a guard ring and is clamped by a Schottky barrier diode.
Claim 8
Dependent Claim 41 words
A line driver integrated circuit as set forth in claim 6, wherein said one of said second plurality of bipolar transistors of said second current mirror circuit is provided with a guard ring and is clamped by a Schottky barrier diode.

References Cited (Backward Citations)

US4346312A Cited
US4549095A Cited
US4947055A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-06-23 1995-12-23 1996-06-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-06-23 1999-12-23 2000-06-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-06-23 2003-12-23 2004-06-23 $7700.00 Window Closed / Lapsed

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