Base drive circuit for Darlington-connected transistors

Claim 2

A drive circuit for rapidly switching driver and driven transistors each having a control electrode and a pair of main current electrodes and connected in a Darlington configuration whereby the control electrode of the driven transistor is coupled to one of the main current electrodes of the driver transistor and the other of the main current electrodes of the driver transistor is coupled to one of the main current electrodes of the driven transistor, comprising: a first controllable switch coupled to the control electrode of the driver transistor and operable to selectively apply a first polarity voltage to the driver and driven transistors to turn on same; an inductor coupled to the first controllable switch and the control electrode of the drier transistor; a second controllable switch coupled to the control electrode of one of the driver and driven transistors and operable to selectively apply a second polarity voltage to the one transistor to turn off the driver and driven transistors; means for controlling the controllable switches and operative at the beginning of a turn on sequence to close the controllable switches and thereby establish current flow through the inductor and operative following the beginning of the turn on sequence for opening the second controllable switch while maintaining the first switch closed so that the current flow through the inductor is provided to the driver transistor to turn on same.

Claim 3

The drive circuit of claim 1, wherein the controlling means includes means for opening the first controllable switch and closing the second controllable switch at the beginning of a turn off sequence so that control electrode currents are drawn from the transistors to turn off same.

Claim 4

The drive circuit of claim 2, further including a second inductor coupled between the control electrode of the driven transistor and the second controllable switch wherein the second inductor delays the drawing of control electrode currents from the driven transistor.

Claim 5

The drive circuit of claim 3, further including a third inductor coupled between the control electrode of the driver transistor and the second controllable switch wherein the third inductor delays the drawing of control electrode currents from the driver transistor.

Claim 6

The drive circuit of claim 2, further including a voltage source coupled to the second controllable switch which develops a particular voltage magnitude of the second polarity and a capacitor coupled between the control electrode of the driver transistor and a junction between the second controllable switch and the first inductor whereby the capacitor is charged when control electrode current is provided to the driver transistor so that a voltage magnitude of the second polarity greater than the particular voltage magnitude is subsequently provided to the control electrode of the driver transistor after the beginning of the turn off sequence.

Claim 7

The drive circuit of claim 3, further including a diode coupled between and poled to conduct current from the control electrode of the driven transistor to the second inductor.

Claim 8

The drive circuit of claim 3, further including a voltage source coupled to the second controllable switch which develops a particular voltage magnitude of the second polarity and a capacitor coupled between the control electrode of the driven transistor and the second inductor whereby the capacitor is charged when control electrode current is provided to the driven transistor so that a voltage magnitude of the second polarity greater than the particular voltage magnitude is subsequently provided to the control electrode of the driven transistor after the beginning of the turn off sequence.

Claim 9

A drive circuit for rapidly switching driver and driven transistors each having a control electrode and a pair of main current electrodes and connected in a Darlington configuration whereby the control electrode of the driven transistor is coupled to one of the main current electrodes of the driver transistor and the other of the main current electrodes of the driver transistor is coupled to one of the main current electrodes of the driven transistor, comprising: a first power source developing a voltage of a first polarity; a first controllable switch coupled to the first power source; a first inductor coupled to the first controllable switch; a capacitor coupled between the first inductor and the control electrode of the driver transistor; a second power source developing a voltage of a second polarity; a second controllable switch coupled between the second power source and a junction between the capacitor and the first inductor; a second inductor coupled between the control electrode of the driven transistor and the second controllable switch; and means for controlling the controllable switches and operative at the beginning of a turn on sequence to close both controllable switches and thereby establish current flow through the first inductor and operative following the beginning of the turn on sequence for opening the second controllable switch while maintaining the first switch closed so that the current flow through the inductor is provided to the control electrodes of the driver and driven transistors to turn on such transistors whereby the capacitor is charged during such time and operative at the beginning of a turn off sequence to open the first controllable switch and to close the second controllable switch whereby the charging of the capacitor and the closing of the second controllable switch causes a voltage of the second polarity greater than the voltage developed by the second power source to be delivered to the control electrode of the driver transistor so that currents are drawn therefrom and whereby currents are drawn from the control electrode of the driven transistor after a delay period following the beginning of the turn off sequence, the length of such delay period being determined by the inductance of the second inductor.

Claim 10

A drive circuit for rapidly switching driver and driven transistors each having a control electrode and a pair of main current electrodes and connected in a Darlington configuration whereby the control electrode of the driven transistor is coupled to one of the main current electrodes of the driver transistor and the other of the main current electrodes of the driver transistor is coupled to one of the main current electrodes of the driven transistor, comprising: a first power source developing a voltage of a first polarity; a first controllable switch coupled to the first power source; a first inductor coupled to the first controllable switch; a capacitor coupled between the first inductor and the control electrode of the driver transistor; a second power source developing a voltage of a second polarity; a second controllable switch coupled between the second power source and a junction between the capacitor and the first inductor; a second inductor coupled between the control electrode of the driven transistor and the second controllable switch; and means for controlling the controllable switches and operative at the beginning of a turn on sequence to close both controllable switches and thereby establish current flow through the first inductor and operative following the beginning of the turn on sequence for opening the second controllable switch while maintaining the first switch closed so that the current flow through the inductor is provided to the control electrodes of the driver and driven transistors to turn on such transistors whereby the capacitor is charged during such time and operative at the beginning of a turn off sequence to open the first controllable switch and to close the second controllable switch whereby the charging of the capacitor and the closing of the second controllable switch causes a voltage of the second polarity greater than the voltage developed by the second power source to be delivered to the control electrode of the driver transistor so that currents are drawn therefrom and whereby currents are drawn from the control electrode of the driven transistor after a delay period following the beginning of the turn off sequence, the length of such delay period being determined by the inductance of the second inductor.

Claim 11

The drive circuit of claim 8, further including a diode coupled between and poled to conduct current from the control electrode of the driven transistor to the second inductor.

Claim 12

The drive circuit of claim 8, further including a second capacitor coupled between the control electrode of the driven transistor and the second inductor whereby the capacitor is charged when current is provided to the control electrode of the driven transistor so that a voltage of the second polarity greater than the voltage developed by the second power source is subsequently provided to the control electrode of the driven transistor after the beginning of the turn off sequence

Claim 13

The drive circuit of claim 8, further including a third inductor coupled between the control electrode of the driver transistor and the second controllable switch wherein the third inductor prevents the drawing of control electrode currents from the driver transistor until after the end of a second delay period following the beginning of the turn off sequence, the length of the second delay period being determined by the inductance of the third inductor.