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US4239988A Expired / Lapsed US ⏱️ 0.0 years remaining

Turn off method for power transistor switch

Assignee: Mitsubishi Electric Corp
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Filing: 1977-08-18
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Granted: 1980-12-16
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Expires: 1997-08-18
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Abstract

Abstract A power transistor switch is disclosed which includes a transistor having an emitter, a collector and a base for ON-OFF switching, the transistor being connected in series to a path connecting a power source and a load. Means are provided for controlling reapplied voltage which is reapplied between the emitter and the collector of the transistor during the transition period when the transistor is switched to the OFF state to suppress the reapplied voltage at the time the collector current is substantially broken.

Inventors

  • 👤 Masahiko Akamatsu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 23:52
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/08; H03K17/081; H03K17/0814; H03K17/08146

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 181 words
A turn-off method for a power transistor switch, the power transistor switch including a first transistor having an emitter, a collector and a base for ON-OFF switching, said first transistor being connected in series in a path connecting a power source and a load, a second transistor having a collector and an emitter which are connected between the collector-base of said first transistor, and a diode connected in reverse parallel between the base-emitter of said second transistor, the turn-off method comprising the steps of: applying a first base reverse bias between the base of said second transistor and the emitter of said first transistor, continuously applying a second base reverse bias between the base of said second transistor and the emitter of said first transistor, the absolute quantity of the first base reverse bias being larger than that of the second base reverse bias, and suppressing with a reapplied voltage suppressing means a reapplied voltage which is reapplied between the emitter and the collector of said first transistor during the transition period for switching said first transistor to the OFF state.
Claim 2
Dependent Claim 181 words
A turn-off method for a power transistor switch, the power transistor switch including a first transistor having an emitter, a collector and a base for ON-OFF switching, said first transistor being connected in series in a path connecting a power source and a load, a second transistor having a collector and an emitter which are connected between the collector-base of said first transistor, and a diode connected in reverse parallel between the base-emitter of said second transistor, the turn-off method comprising the steps of: applying a first base reverse bias between the base of said second transistor and the emitter of said first transistor, continuously applying a second base reverse bias between the base of said second transistor and the emitter of said first transistor, the absolute quantity of the first base reverse bias being larger than that of the second base reverse bias, and suppressing with a reapplied voltage suppressing means a reapplied voltage which is reapplied between the emitter and the collector of said first transistor during the transition period for switching said first transistor to the OFF state.
Claim 3
Dependent Claim 205 words
A turn-off method for a power transistor switch, the power transistor switch including a transistor having an emitter, a collector and a base for ON-OFF switching, the transistor being connected in series in a path connecting a power source and a load, said transistor being connected to another transistor to form a Darlington connection of at least two power transistors, the turn-off method comprising the steps of: applying a first base reverse bias to the base, continuously applying a second base reverse bias to the base, the absolute quantity of the first base reverse bias being larger than that of the second base reverse bias; suppressing with a reapplied voltage suppressing means a reapplied voltage which is reapplied between the emitter and the collector of the transistor during the transition period for switching the transistor to the OFF state; and applying the switching power during the transition period for switching to the OFF state to the reapplied voltage suppressing means and one of the Darlington transistors and applying the switching power during the transition period for switching to the ON state to the other one of the Darlington transistors, said Darlington connection improving partial reception of the switching power and high frequency large power switching.
Claim 4
Dependent Claim 205 words
A turn-off method for a power transistor switch, the power transistor switch including a transistor having an emitter, a collector and a base for ON-OFF switching, the transistor being connected in series in a path connecting a power source and a load, said transistor being connected to another transistor to form a Darlington connection of at least two power transistors, the turn-off method comprising the steps of: applying a first base reverse bias to the base, continuously applying a second base reverse bias to the base, the absolute quantity of the first base reverse bias being larger than that of the second base reverse bias; suppressing with a reapplied voltage suppressing means a reapplied voltage which is reapplied between the emitter and the collector of the transistor during the transition period for switching the transistor to the OFF state; and applying the switching power during the transition period for switching to the OFF state to the reapplied voltage suppressing means and one of the Darlington transistors and applying the switching power during the transition period for switching to the ON state to the other one of the Darlington transistors, said Darlington connection improving partial reception of the switching power and high frequency large power switching.

References Cited (Backward Citations)

US3204145A Cited
US3571624A Cited
US3571614A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-12-16 1984-06-16 1984-12-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-12-16 1988-06-16 1988-12-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-12-16 1992-06-16 1992-12-16 $7700.00 Window Closed / Lapsed

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