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US4234805A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuit and method for paralleling power transistors

Assignee: EVC Inc
•
Filing: 1978-03-15
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Granted: 1980-11-18
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Expires: 1998-03-15
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Abstract

Abstract A circuit and method of paralleling power transistors connected as a Darlington circuit or device for use with electric motor controls. The circuit is comprised of a plurality of Darlington devices having a drive circuit from a motor controller connected to a common base connection and a plurality of active pull-down circuits for reducing the rise and fall times and effectively controlling the storage times of the power transistors. The active pull-down circuits are capacity coupled to an inverted drive signal to synchronize the turn-off time and speed-up discharge of storage in the power transistor circuit.

Inventors

  • 👤 II George D. Carlsen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 19:40
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/04; H03K17/041; H03K17/0412; H03K17/04126; H03K17/12

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 116 words
A high-current switching transistor circuit comprising: a first Darlington device; at least one other Darlington device; said Darlington devices being connected in a parallel pin-for-pin configuration; drive source means for driving said Darlington devices said drive source means being directly connected to an input common base connection of all of said Darlington devices; first pull-down circuit means connected to said common base connection of the Darlington devices to reduce the storage time of power transistor in said Darlington devices; at least one other pull-down circuit means connected to a base to emitter connection in each Darlington device for synchronizing the turn-off times of said Darlington devices while further reducing the storage time of said power transistors.
Claim 2
Dependent Claim 116 words
A high-current switching transistor circuit comprising: a first Darlington device; at least one other Darlington device; said Darlington devices being connected in a parallel pin-for-pin configuration; drive source means for driving said Darlington devices said drive source means being directly connected to an input common base connection of all of said Darlington devices; first pull-down circuit means connected to said common base connection of the Darlington devices to reduce the storage time of power transistor in said Darlington devices; at least one other pull-down circuit means connected to a base to emitter connection in each Darlington device for synchronizing the turn-off times of said Darlington devices while further reducing the storage time of said power transistors.
Claim 3
Dependent Claim 20 words
The switching circuit according to claim 1 including: connecting means connecting said first pull-down circuit to said drive source means.
Claim 4
Dependent Claim 14 words
The switching circuit according to claim 2 wherein said connecting means comprises a capacitor.
Claim 5
Dependent Claim 21 words
The switching circuit according to claim 1 including: connecting means connecting all said pull-down circuit means to said drive source means.
Claim 6
Dependent Claim 14 words
The switching circuit according to claim 4 wherein said connecting means comprises a capacitor.
Claim 7
Dependent Claim 25 words
The switching circuit according to claim 5 wherein said first pull-down circuit comprises: a transistor connecting the common base of said Darlington devices to ground.
Claim 8
Dependent Claim 28 words
The switching circuit according to claim 6 wherein said other pull-down circuit comprises a transistor connecting all the emitter to base connections of said Darlington devices to ground.
Claim 9
Independent Claim 70 words
A method for parallel connection of a plurality of high-current switching transistors connected as Darlington devices, comprising: connecting a plurality of said Darlington devices in a pin-for-pin parallel configuration; directly coupling an input base connection of all of said Darlington devices in a common base configuration; simultaneously discharging the commonly connected bases and base to emitter connections in said Darlington devices; and synchronizing the turn-off time of said Darlington devices.
Claim 10
Independent Claim 70 words
A method for parallel connection of a plurality of high-current switching transistors connected as Darlington devices, comprising: connecting a plurality of said Darlington devices in a pin-for-pin parallel configuration; directly coupling an input base connection of all of said Darlington devices in a common base configuration; simultaneously discharging the commonly connected bases and base to emitter connections in said Darlington devices; and synchronizing the turn-off time of said Darlington devices.
Claim 11
Dependent Claim 54 words
The method according to claim 8 wherein the step of simultaneously discharging the commonly connected bases and the base to emitter connections of said Darlington devices comprises: connecting a first pull-down circuit to said commonly connected bases; and connecting a second pull-down circuit to all the base to emitter connections of said Darlington devices.
Claim 12
Dependent Claim 31 words
The method according to claim 9 wherein the step of synchronizing the turn-off time of said Darlington devices comprises: applying an inverted drive signal to said first and second pull-down circuits.
Claim 13
Dependent Claim 51 words
The method according to claim 8 wherein said step of synchronizing the turn-off time comprises: connecting a single discharge means to all the base to emitter connections of said Darlington devices; applying an inverted drive signal to said discharge means whereby the discharge and turn-off of said Darlington devices occur simultaneously.

References Cited (Backward Citations)

US3831102A Cited
US4100564A Cited
US4128742A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-11-18 1984-05-19 1984-11-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-11-18 1988-05-19 1988-11-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-11-18 1992-05-19 1992-11-18 $7700.00 Window Closed / Lapsed

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