← Back to Patent Explorer
US4128742A Expired / Lapsed US ⏱️ 0.0 years remaining

Rugged crosspoints for communication systems

Assignee: AT&T Inc
•
Filing: 1977-08-15
•
Granted: 1978-12-05
•
Expires: 1997-08-15
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A bilateral solid-state crosspoint for use in a telecommunications switching network is disclosed comprising a pair of Darlington connected pairs of transistors connected in a complementary relationship. The transmission path in each direction through the crosspoint comprises a Darlington connected pair of transistors and one additional semiconductor junction. A control circuit provides base drive to the transistors to close the crosspoint.

Inventors

  • 👤 James A. Davis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 11:06
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/62; H03K17/6221; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/52; H04Q3/521

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 85 words
An analog switching circuit arrangement comprising: first and second transmission terminals; and a crosspoint comprising: first and second Darlington connected pairs of transistors connected in complementary relation to form two oppositely poled transmission paths between said first and second transmission terminals, each of said paths comprising a Darlington connected pair of transistors and one additional series connected semiconductor junction; and control means for selectively supplying control current to said Darlington pairs to place all of said transistors in the conducting state at the same time.
Claim 2
Dependent Claim 85 words
An analog switching circuit arrangement comprising: first and second transmission terminals; and a crosspoint comprising: first and second Darlington connected pairs of transistors connected in complementary relation to form two oppositely poled transmission paths between said first and second transmission terminals, each of said paths comprising a Darlington connected pair of transistors and one additional series connected semiconductor junction; and control means for selectively supplying control current to said Darlington pairs to place all of said transistors in the conducting state at the same time.
Claim 3
Dependent Claim 39 words
An analog switching circuit arrangement in accordance with claim 1 wherein said additional semiconductor junction in each transmission path comprises a diode poled in the same direction as the transistors of the Darlington pair in the same transmission path.
Claim 4
Dependent Claim 37 words
An analog switching circuit arrangement in accordance with claim 1 wherein said additional series connected semiconductor junction in each transmission path comprises a base to collector junction of one of the transistors in the other transmission path.
Claim 5
Dependent Claim 73 words
An analog switching circuit arrangement in accordance with claim 1 wherein said control means comprises first and second control transistors comprising collector terminals connected respectively to the base of one of the Darlington connected transistors in the respective first and second transmission paths, the bases of said control transistors being connected together and to a control terminal and the emitters of said control transistors being connected via individual resistors to a potential terminal.
Claim 6
Dependent Claim 122 words
An analog switching circuit arrangement comprising: first and second transmission terminals; a crosspoint comprising: first and second oppositely poled unidirectional transmission paths interconnecting said first and second transmission terminals, each of said transmission paths comprising: first and second NPN transistors, the collectors of said transistors connected together and to one of said transmission terminals, the emitter of said first transistor coupled to said other transmission terminal by semiconductor means poled in the same direction as the base to emitter junction of said first transistor, the emitter of said second transistor connected to the base of said first transistor; and control means coupled to the base of said second transistor for placing both said first and said second transistors in the conducting mode.
Claim 7
Dependent Claim 122 words
An analog switching circuit arrangement comprising: first and second transmission terminals; a crosspoint comprising: first and second oppositely poled unidirectional transmission paths interconnecting said first and second transmission terminals, each of said transmission paths comprising: first and second NPN transistors, the collectors of said transistors connected together and to one of said transmission terminals, the emitter of said first transistor coupled to said other transmission terminal by semiconductor means poled in the same direction as the base to emitter junction of said first transistor, the emitter of said second transistor connected to the base of said first transistor; and control means coupled to the base of said second transistor for placing both said first and said second transistors in the conducting mode.
Claim 8
Dependent Claim 41 words
An analog switching circuit arrangement in accordance with claim 5 wherein said control means comprises one PNP control transistor for each of said transmission paths and means for simultaneously controlling the PNP transistors associated with said first and second transmission paths.
Claim 9
Dependent Claim 49 words
An analog switching circuit arrangement in accordance with claim 5 wherein said semiconductor means coupling the emitter of said first transistor to said other transmission terminal comprises a diode having the anode connected to the emitter of said first transistor and the cathode connected to said other transmission terminal.
Claim 10
Dependent Claim 44 words
An analog switching circuit arrangement in accordance with claim 5 wherein said semiconductor means coupling the emitter of said first transistor to said other transmission terminal comprises the base to collector junction of one of the transistors in the oppositely poled unidirectional transmission path.

References Cited (Backward Citations)

US3828314A Cited
US3872439A Cited
US3886369A Cited
US4032892A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-12-04 1982-06-05 1982-12-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-12-04 1986-06-05 1986-12-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-12-04 1990-06-05 1990-12-05 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag