Bicmos voltage generator

Claim 1

In a bias network for providing a first and a second ECL reference voltage, the network of the type that includes a first bipolar npn network transistor having a base connected to that of a second bipolar npn network transistor, the emitter of the second transistor being connected to a first power terminal and that of the first transistor being connected to said first power terminal through a resistor, the collectors of the transistors being connected to a common node through resistors and a third bipolar npn network transistor having an emitter connected to said common node, an improvement comprising a differential amplifier configured to adjust the potential voltage at the base of the third transistor to equalize the potentials at the collectors of the first and second transistors, the differential amplifier including: a first bipolar npn input transistor having a base connected to the collector of the first network transistor, a second bipolar npn input transistor having a base connected to the collector of the second network transistor, a first p-channel FET having a drain connected to the collector of the first input transistor and a source connected to the second power supply terminal, a second p-channel FET having a drain connected to the collector of the second input transistor and a source connected to the second power supply terminal, and a third FET connecting the collector of the third network transistor to said common node, the third FET having a gate connected to the drain of said first FET.

Claim 4

A method of controlling an ECL bias network of the type that includes first, second and third bipolar network transistors, the first transistor having a base connected to that of the second transistor, the second transistor having an emitter connected to a first power terminal, the first transistor having an emitter connected to the first power terminal through a resistor, collectors of the first and second transistors being connected to a common node through resistors, the third transistor having an emitter connected to the common node, the method comprising: regulating the voltage at the common node so that voltages of the collectors of said first and second transistors are equal by controlling the voltage at the base of the third transistor, controlling the voltage at said base being accomplished by means of: a differential amplifier, the differential amplifier having a first npn input transistor in connection with the collector of the first network transistor, a second npn input transistor in connection with the collector of the second network transistor, and first and second p-channel amplifier FETs connected as a current mirror wherein the first FET is in series with the first input transistor and the second FET is in series with the second input transistor, and a third p-channel FET connected between the collector of the third transistor and said common node.

Claim 5

A method of controlling an ECL bias network of the type that includes first, second and third bipolar network transistors, the first transistor having a base connected to that of the second transistor, the second transistor having an emitter connected to a first power terminal, the first transistor having an emitter connected to the first power terminal through a resistor, collectors of the first and second transistors being connected to a common node through resistors, the third transistor having an emitter connected to the common node, the method comprising: regulating the voltage at the common node so that voltages of the collectors of said first and second transistors are equal by controlling the voltage at the base of the third transistor, controlling the voltage at said base being accomplished by means of: a differential amplifier, the differential amplifier having a first npn input transistor in connection with the collector of the first network transistor, a second npn input transistor in connection with the collector of the second network transistor, and first and second p-channel amplifier FETs connected as a current mirror wherein the first FET is in series with the first input transistor and the second FET is in series with the second input transistor, and a third p-channel FET connected between the collector of the third transistor and said common node.

Claim 15

A method of regulating a reference voltage provided by an ECL bias network of the type that includes first, second and third network transistors, the first and second transistors having emitters in electrical communication with a first power supply line terminal and collectors in electrical communication with a common node and the third transistor having an emitter in electrical communication with the common node and a collector in electrical communication with a second power supply line terminal, the method comprising: comparing electric potentials at the collectors of the first and second transistors; deriving a control signal having a magnitude determined by any difference between said potentials; and applying the control signal to the third transistor so as to equalize said potentials and thereby maintain the reference voltage at a constant level notwithstanding any power supply line variations.

Claim 16

A method of regulating a reference voltage provided by an ECL bias network of the type that includes first, second and third network transistors, the first and second transistors having emitters in electrical communication with a first power supply line terminal and collectors in electrical communication with a common node and the third transistor having an emitter in electrical communication with the common node and a collector in electrical communication with a second power supply line terminal, the method comprising: comparing electric potentials at the collectors of the first and second transistors; deriving a control signal having a magnitude determined by any difference between said potentials; and applying the control signal to the third transistor so as to equalize said potentials and thereby maintain the reference voltage at a constant level notwithstanding any power supply line variations.