US4820967A
Expired / Lapsed
US
⏱️ 0.0 years remaining
BiCMOS voltage reference generator
Assignee: National Semiconductor Corp
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Filing: 1988-02-02
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Granted: 1989-04-11
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Expires: 2008-02-02
Abstract
Abstract A BiCMOS voltage reference generator circuit generates and maintains a reference voltage within 3 mV over an 80° C. temperture range and over a 1 volt change in power supply level. The circuit uses feedback from the output of the reference voltage generator to the current source supplying current to the voltage reference generator. This feedback increases the effective output impedance of the current source, making the reference voltage output substantially independent of power supply variations. The circuit operates with power supply differential as low as about 3 volts, and preferably is fabricated from bipolar transistors and MOS transistors on the same chip.
Inventors
- 👤 Robert A. Kertis
- 👤 Douglas D. Smith
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 19:08
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/30
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
136 words
A reference voltage generator for generating a stable voltage over variations of source voltage and temperature of the type including an inner loop reference voltage generator connected to receive feedback current from a current mirror, comprising: a inner loop reference voltage generator connected to receive a source voltage, including means for generating an inner loop reference voltage from said source voltage, means for generating a reference voltage form said inner loop reference voltage and a feedback current, and further including a feedback current receiving node for receiving said feedback current from a current mirror; and a current mirror connected to receive said reference voltage for generating from said reference voltage a feedback current, said current mirror circuit connected to said feedback current receiving node for outputting to said inner loop reference voltage generator said feedback current.
Claim 2
Dependent Claim
136 words
A reference voltage generator for generating a stable voltage over variations of source voltage and temperature of the type including an inner loop reference voltage generator connected to receive feedback current from a current mirror, comprising: a inner loop reference voltage generator connected to receive a source voltage, including means for generating an inner loop reference voltage from said source voltage, means for generating a reference voltage form said inner loop reference voltage and a feedback current, and further including a feedback current receiving node for receiving said feedback current from a current mirror; and a current mirror connected to receive said reference voltage for generating from said reference voltage a feedback current, said current mirror circuit connected to said feedback current receiving node for outputting to said inner loop reference voltage generator said feedback current.
Claim 3
Dependent Claim
59 words
The reference voltage generator of claim 1, wherein said inner loop reference voltage generator includes first and second transistors having a net base-emitter voltage difference, converter means for converting said base-emitter voltage difference into a reference current, and current-controlling means for controlling said reference current such that said reference current is constant over variations in source voltage and temperature.
Claim 4
Dependent Claim
58 words
The reference voltage generator of claim 2, wherein said inner loop reference voltage generator includes means for scaling said base-emitter voltage difference, and further includes a third transistor connected to said first and second transistors such that the base-emitter voltage of said third transistor is added to the scaled base-emitter voltage difference to produce thereby said reference voltage.
Claim 5
Dependent Claim
37 words
The reference voltage generator of claim 1, wherein said current mirror includes first and second current sources connected so as to present to said feedback current receiving node a high impedance current proportional to said reference voltage.
Claim 6
Dependent Claim
18 words
The reference voltage generator of claim 4, wherein said first and second current sources are CMOS-type semiconductor devices.
Claim 7
Dependent Claim
23 words
The reference voltage generator of claim 4, further including means for reducing the frequency response of the reference voltage generator to prevent oscillation.
Claim 8
Dependent Claim
21 words
The reference voltage generator of claim 6, wherein said means for reducing comprises a capacitor connected across said first current source.
Claim 9
Dependent Claim
32 words
The reference voltage generator of claim 1, further including means for preventing the reference voltage from remaining at other than a preselected voltage when power to the reference voltage generator is applied.
Claim 10
Dependent Claim
44 words
The reference voltage generator of claim 8, wherein said means for preventing the reference voltage from remaining at other than a preselected voltage includes a third current source connected to said current mirror to allow a trickle current to flow through the current mirror.
Claim 11
Dependent Claim
198 words
A reference voltage generator for generating a stable voltage over variations of source voltage and temperature of the type including an inner loop reference voltage generator connected to receive feedback current from a current mirror, comprising: an inner loop reference voltage generator connected to receive a source voltage, including means for generating an inner loop reference voltage from said source voltage and means for generating a reference voltage form said inner loop reference voltage and a feedback current, and further including a feedback current receiving node for receiving said feedback current from a current mirror; a current mirror connected to receive said reference voltage including first and second current sources, for generating from said reference voltage a feedback current, and further connected so as to present to said feedback current receiving node a high impedance current proportional to said reference voltage; means for preventing the reference voltage from remaining at other than a preselected voltage including a third current source connected to said current mirror to allow a trickle current to flow through the current mirror; and a capacitor connected across the first current source for reducing the frequency response of the reference voltage generator to prevent oscillation.
Claim 12
Dependent Claim
198 words
A reference voltage generator for generating a stable voltage over variations of source voltage and temperature of the type including an inner loop reference voltage generator connected to receive feedback current from a current mirror, comprising: an inner loop reference voltage generator connected to receive a source voltage, including means for generating an inner loop reference voltage from said source voltage and means for generating a reference voltage form said inner loop reference voltage and a feedback current, and further including a feedback current receiving node for receiving said feedback current from a current mirror; a current mirror connected to receive said reference voltage including first and second current sources, for generating from said reference voltage a feedback current, and further connected so as to present to said feedback current receiving node a high impedance current proportional to said reference voltage; means for preventing the reference voltage from remaining at other than a preselected voltage including a third current source connected to said current mirror to allow a trickle current to flow through the current mirror; and a capacitor connected across the first current source for reducing the frequency response of the reference voltage generator to prevent oscillation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1992-04-10 | 1992-10-10 | 1993-04-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-04-10 | 1996-10-10 | 1997-04-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-04-10 | 2000-10-10 | 2001-04-11 | $7700.00 | Window Closed / Lapsed |