US4287439A
Expired / Lapsed
US
⏱️ 0.0 years remaining
MOS Bandgap reference
Assignee: Motorola Solutions Inc
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Filing: 1979-04-30
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Granted: 1981-09-01
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Expires: 1999-04-30
Abstract
Abstract A bandgap voltage reference source is provided which is temperature stable or temperature controlled and can be made by standard CMOS process. The reference has two substrate bipolar transistors with the emitter current density of one of the transistors being larger than the emitter current density of the other transistor. The transistors are used as emitter followers having resistors in their emitter circuits from which an error voltage is obtained. The error voltage is amplified through a differential or operational amplifier. Through the amplifier or through a resistor network, an output voltage higher or lower, respectively, than the bandgap voltage can be obtained. The output voltage can be made to have a positive, negative, or zero temperature coefficient.
Inventors
- 👤 Horst Leuschner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 23:40
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/30
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
202 words
A bandgap reference circuit comprising: a first voltage potential terminal; a second voltage potential terminal; a first transistor having a base, a collector, and an emitter, the collector being coupled to the first voltage potential terminal; a second transistor having a base, a collector, and an emitter, the collector of the second transistor being coupled to the first voltage potential terminal, the emitter current density of the first transistor being larger than the emitter current density of the second transistor; a first resistor coupled between the emitter of the first transistor and the second voltage potential terminal; a second and a third resistor connected in series and forming a node therebetween, the second and third resistors being coupled in series between the emitter of the second transistor and the second voltage potential terminal; an amplifier having field effect transistors and also having a first and a second input and an output, the first input being coupled to the emitter of the first transistor, and the second input being coupled to the node between the second and third resistors, the output of the amplifier providing the bandgap reference voltage, and the output being coupled to the bases of the first and second transistors.
Claim 2
Dependent Claim
202 words
A bandgap reference circuit comprising: a first voltage potential terminal; a second voltage potential terminal; a first transistor having a base, a collector, and an emitter, the collector being coupled to the first voltage potential terminal; a second transistor having a base, a collector, and an emitter, the collector of the second transistor being coupled to the first voltage potential terminal, the emitter current density of the first transistor being larger than the emitter current density of the second transistor; a first resistor coupled between the emitter of the first transistor and the second voltage potential terminal; a second and a third resistor connected in series and forming a node therebetween, the second and third resistors being coupled in series between the emitter of the second transistor and the second voltage potential terminal; an amplifier having field effect transistors and also having a first and a second input and an output, the first input being coupled to the emitter of the first transistor, and the second input being coupled to the node between the second and third resistors, the output of the amplifier providing the bandgap reference voltage, and the output being coupled to the bases of the first and second transistors.
Claim 3
Dependent Claim
14 words
The bandgap reference circuit of claim 1 wherein the amplifier is a CMOS amplifier.
Claim 4
Dependent Claim
27 words
The bandgap reference of claim 1 further including a plurality of resistors coupled in series between the output of the amplifier and the second voltage potential terminal.
Claim 5
Dependent Claim
19 words
The bandgap reference of claim 1 wherein the first resistor is smaller in ohmic value than the third resistor.
Claim 6
Dependent Claim
175 words
A reference circuit coupled between a first and a second voltage terminal, comprising: a first substrate bipolar transistor having a base, an emitter, and a collector, the collector being coupled to the first voltage terminal; a second substrate bipolar transistor having a base, an emitter, and a collector, the collector of the second transistor being coupled to the first voltage terminal, the emitter current density of the first transistor being larger than the emitter current density of the second transistor; a first resistor coupled between the emitter of the first transistor and the second voltage terminal; a second and a third resistor coupled in series between the emitter of the second transistor and the second voltage terminal, the second and third resistors forming a node therebetween; and a differential amplifier having an output and a first and a second input, the first input being coupled to the emitter of the first transistor, the second input being coupled to the node between the second and third resistors, and the output providing a temperature stable reference voltage.
Claim 7
Dependent Claim
175 words
A reference circuit coupled between a first and a second voltage terminal, comprising: a first substrate bipolar transistor having a base, an emitter, and a collector, the collector being coupled to the first voltage terminal; a second substrate bipolar transistor having a base, an emitter, and a collector, the collector of the second transistor being coupled to the first voltage terminal, the emitter current density of the first transistor being larger than the emitter current density of the second transistor; a first resistor coupled between the emitter of the first transistor and the second voltage terminal; a second and a third resistor coupled in series between the emitter of the second transistor and the second voltage terminal, the second and third resistors forming a node therebetween; and a differential amplifier having an output and a first and a second input, the first input being coupled to the emitter of the first transistor, the second input being coupled to the node between the second and third resistors, and the output providing a temperature stable reference voltage.
Claim 8
Dependent Claim
202 words
The reference circuit of claim 5 wherein the differential amplifier is a CMOS amplifier having first and second field effect transistors (FET) of a first conductivity type each having a gate electrode and a first and a second electrode, each FET having its second electrode coupled together, the gate electrode of the first FET being coupled to the emitter of the first substrate bipolar transistor, the gate electrode of the second FET being coupled to the node between the second and third resistors; and third and fourth FETs of a second conductivity type each having a first and a second electrode and a gate electrode, the third and fourth FETs having their first electrode coupled to the first voltage terminal, the second electrode of the third FET being coupled to the first electrode of the first FET, the second electrode of the fourth FET being coupled to the first electrode of the second FET and providing the output for the differential amplifier, the gate electrodes of the third and fourth FETs being coupled together to the second electrode of the first FET; and a current source coupled from the second electrodes of the first and second FETs to the second voltage terminal.
Claim 9
Dependent Claim
36 words
The reference circuit of claim 6 further including a fourth resistor coupled to the output of the differential amplifier and a diode connected field effect transistor coupled from the fourth resistor to the second voltage terminal.
Claim 10
Dependent Claim
26 words
The reference circuit of claim 6 further including a diode connected field effect transistor coupled between the second voltage terminal and the first and third resistors.
References Cited (Backward Citations)
US4071813A
Cited
US4158804A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-08-31 | 1985-03-02 | 1985-09-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-08-31 | 1989-03-02 | 1989-09-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-08-31 | 1993-03-02 | 1993-09-01 | $7700.00 | Window Closed / Lapsed |