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US5114880A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for fabricating multiple electronic devices within a single carrier structure

Assignee: Motorola Solutions Inc
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Filing: 1991-05-28
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Granted: 1992-05-19
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Expires: 2011-05-28
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Abstract

Abstract The disclosed invention comprises multiple semiconductor devices within a single carrier structure. In accordance with one embodiment of the invention, a plurality of semiconductor die are coupled to the leads of a leadframe and are encapsulated by individual package bodies. A carrier structure is formed which encircles all of the die and encapsulates portions of the distal ends of the leads. The extreme distal portions of the leads extend through the carrier to form contact points which are used to access the semiconductor die. By having multiple devices within a single carrier, productivity is improved and costs associated with leadframe and carrier structure materials are reduced.

Inventors

  • 👤 Paul T. Lin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 00:57
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/01; H10W70/04; H10W70/048; H10W74/00; H10W74/01; H10W74/016; H10W90/00; H10W90/701; H10W90/751; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 148 words
A method for fabricating multiple electronic devices within a single carrier structure, comprising the steps of: providing a leadframe having a plurality of semiconductor die receiving areas, each of which are surrounded on at least two sides by a plurality of leads having proximal ends near said receiving areas and distal ends away from said receiving area; providing a plurality of semiconductor die; positioning said semiconductor die within said semiconductor die receiving areas; electrically coupling said die to said proximal ends of said plurality of leads of said leadframe; providing a plurality of package bodies which encapsulate each of said semiconductor die and portions of said proximal ends of said plurality of leads; and providing a single carrier structure which encapsulates portions of said distal ends of said plurality of leads and encircles said plurality of package bodies, allowing individual electrical access to each of said semiconductor die.
Claim 2
Independent Claim 148 words
A method for fabricating multiple electronic devices within a single carrier structure, comprising the steps of: providing a leadframe having a plurality of semiconductor die receiving areas, each of which are surrounded on at least two sides by a plurality of leads having proximal ends near said receiving areas and distal ends away from said receiving area; providing a plurality of semiconductor die; positioning said semiconductor die within said semiconductor die receiving areas; electrically coupling said die to said proximal ends of said plurality of leads of said leadframe; providing a plurality of package bodies which encapsulate each of said semiconductor die and portions of said proximal ends of said plurality of leads; and providing a single carrier structure which encapsulates portions of said distal ends of said plurality of leads and encircles said plurality of package bodies, allowing individual electrical access to each of said semiconductor die.
Claim 3
Dependent Claim 32 words
The method for fabricating of claim 1 further comprising the step of excising said plurality of package bodies from said leadframe, thereby removing said plurality of package bodies from said carrier structure.
Claim 4
Dependent Claim 30 words
The method for fabricating of claim 1 wherein said step of providing a plurality of package bodies comprises providing a plurality of package tops and a plurality of package bottoms.
Claim 5
Dependent Claim 26 words
The method for fabricating of claim 1 wherein said step of providing a carrier structure comprises providing a carrier structure top and a carrier structure bottom.
Claim 6
Dependent Claim 26 words
The method for fabricating of claim 1 wherein said step of providing a carrier structure comprises providing a carrier structure which is made from a metal.
Claim 7
Dependent Claim 28 words
The method for fabricating of claim 1 wherein said step of providing a plurality of semiconductor die comprises providing a plurality of semiconductor die which are memory devices.
Claim 8
Independent Claim 235 words
A method for fabricating multiple electronic devices within a single carrier structure, comprising the steps of: providing a leadframe having a plurality of semiconductor die receiving areas, each having on at least two sides a plurality of leads having proximal ends near said receiving areas, distal ends away from said receiving areas, and intermediate portions located between said proximal and distal ends; providing a plurality of semiconductor die each having a plurality of bonding sites; electrically coupling said proximal ends of said plurality of leads to said plurality of bonding sites; positioning said leadframe with said semiconductor die electrically coupled thereto in a mold tool such that individual cavities are formed around each of said plurality of semiconductor die and portions of said proximal ends of said plurality of leads, and a ring-shaped cavity is formed around portions of said distal ends of said plurality of leads and encircles other said cavities; introducing a molding compound into said individual cavities, thereby creating package bodies which encapsulate said semiconductor die and portions of said proximal ends of said plurality of leads; and introducing a molding compound into said ring-shaped cavity, thereby creating a single carrier structure which encapsulates portions of said distal ends of said plurality of leads, encircles said package bodies, is separated from said package bodies by said intermediate portions of said leads, and allows individual electrical access to each of said semiconductor die.
Claim 9
Independent Claim 235 words
A method for fabricating multiple electronic devices within a single carrier structure, comprising the steps of: providing a leadframe having a plurality of semiconductor die receiving areas, each having on at least two sides a plurality of leads having proximal ends near said receiving areas, distal ends away from said receiving areas, and intermediate portions located between said proximal and distal ends; providing a plurality of semiconductor die each having a plurality of bonding sites; electrically coupling said proximal ends of said plurality of leads to said plurality of bonding sites; positioning said leadframe with said semiconductor die electrically coupled thereto in a mold tool such that individual cavities are formed around each of said plurality of semiconductor die and portions of said proximal ends of said plurality of leads, and a ring-shaped cavity is formed around portions of said distal ends of said plurality of leads and encircles other said cavities; introducing a molding compound into said individual cavities, thereby creating package bodies which encapsulate said semiconductor die and portions of said proximal ends of said plurality of leads; and introducing a molding compound into said ring-shaped cavity, thereby creating a single carrier structure which encapsulates portions of said distal ends of said plurality of leads, encircles said package bodies, is separated from said package bodies by said intermediate portions of said leads, and allows individual electrical access to each of said semiconductor die.
Claim 10
Dependent Claim 31 words
The method for fabricating of claim 7 wherein the steps of introducing a molding compound into said individual cavities and introducing a molding compound into said ring-shaped cavity are done simultaneously.
Claim 11
Dependent Claim 31 words
The method for fabricating of claim 7 wherein the steps of introducing a molding compound into said individual cavities and introducing a molding compound into said ring-shaped cavity are done sequentially.
Claim 12
Dependent Claim 24 words
The method for fabricating of claim 7 further comprising the step of excising said carrier structure with said packaged semiconductor devices from said leadframe.

References Cited (Backward Citations)

US4801997A Cited
US4701781A Cited
US4791472A Cited
US4837184A Cited
US4897602A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-05-19 1995-11-18 1996-05-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-05-19 1999-11-18 2000-05-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-05-19 2003-11-18 2004-05-19 $7700.00 Window Closed / Lapsed

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