Communication system with external reference signal processing capability

Claim 1

A system for phase synchronizing the operation of a plurality of communication modules to a common external reference signal which may assume any one of a number of predetermined frequencies, comprising: a plurality of phase lock loop circuits including lock monitor subcircuits providing lock indication signals, one of which loop circuits is associated with each of said modules, for tracking said external reference signal and generating a base reference signal of a specified frequency for use by the module with which it is associated, said base reference signal characterized by a frequency spectrum having a reduced level of spurious signals and noise; and an automatic control circuit adapted for responding to and processing said external reference signal, including: a variable divider arranged for translating said external reference signal to a standard frequency, and means for controlling said divider in response to said lock indication signal to select said standard frequency for input to each of said phase lock loop, each said means for controlling including; a timer circuit for providing pulse output signals in response to a negative lock indication signal from the phase lock loop with which the control circuit is associated with, and a counter circuit responsive to the pulse output signals from sad timer circuit for supplying digital control signals to said variable divider.

Claim 2

A system for phase synchronizing the operation of a plurality of communication modules to a common external reference signal which may assume any one of a number of predetermined frequencies, comprising: a plurality of phase lock loop circuits including lock monitor subcircuits providing lock indication signals, one of which loop circuits is associated with each of said modules, for tracking said external reference signal and generating a base reference signal of a specified frequency for use by the module with which it is associated, said base reference signal characterized by a frequency spectrum having a reduced level of spurious signals and noise; and an automatic control circuit adapted for responding to and processing said external reference signal, including: a variable divider arranged for translating said external reference signal to a standard frequency, and means for controlling said divider in response to said lock indication signal to select said standard frequency for input to each of said phase lock loop, each said means for controlling including; a timer circuit for providing pulse output signals in response to a negative lock indication signal from the phase lock loop with which the control circuit is associated with, and a counter circuit responsive to the pulse output signals from sad timer circuit for supplying digital control signals to said variable divider.