Apparatus and associated methods for converting serial data pattern signals transmitted or suitable for transmission over a high speed synchronous serial transmission media, to parallel pattern output signals

Claim 2

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein the number of receivers is equal to the number of parallel data pattern output signals represented by the serial pattern data input signals.

Claim 3

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein the number of receivers is greater than the number of parallel data pattern output signals represented by the serial pattern data input signals.

Claim 4

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein the number of receivers is greater than the number of parallel data pattern output signals represented by the serial pattern data input signals.

Claim 5

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said first means of each receiver is further operable to output clock pulses suitable for synchronizing the operation of external devices with the operation of that receiver.

Claim 6

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said first means of each receiver is further operable to output clock pulses suitable for synchronizing the operation of external devices with the operation of that receiver.

Claim 7

The plurality of receivers according to claim 3 wherein the number of receivers is less than the number of parallel data pattern output signals represented by the serial pattern data input signals.

Claim 8

Apparatus as set forth in claim 3 wherein said first means of each receiver is authorized and enabled to capture said input signals only in response to the presence of a catch authorization signal input to the receiver.

Claim 9

Apparatus as set forth in claim 5 wherein said first means of each receiver is further operable to generate a signal indicating the capture of said input signals.

Claim 10

Apparatus as set forth in claim 5 wherein the output clock pulses from one of said receivers may optionally serve as said catch authorization signal for another one of said receivers.

Claim 11

Apparatus as set forth in claim 3 wherein said first means of each receiver is further operable to generate clock pulses for the internal synchronization of that receiver.

Claim 12

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said parallel data pattern outputs have a plurality of data output types, and wherein said second means of each receiver is operable to identify said type of parallel data pattern outputs.

Claim 13

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said parallel data pattern outputs have a plurality of data output types, and wherein said second means of each receiver is operable to identify said type of parallel data pattern outputs.

Claim 14

Apparatus as set forth in claim 9 wherein said second means of each receiver is further operable to internally, automatically, demultiplex said decoded data.

Claim 15

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern serial data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said second means of each receiver is operable in response to a selected control signal indicative of data width, to decode each of said captured input signals as a function of the data width indicated.

Claim 16

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern serial data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said second means of each receiver is operable in response to a selected control signal indicative of data width, to decode each of said captured input signals as a function of the data width indicated.

Claim 17

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop including a phase detector that ignores missing pulses.

Claim 18

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop including a phase detector that ignores missing pulses.

Claim 19

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto: (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop incorporating a master/slave oscillator arrangement.

Claim 20

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto: (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop incorporating a master/slave oscillator arrangement.

Claim 21

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recover loop operating at the bit rate of said separated clock stream.

Claim 22

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recover loop operating at the bit rate of said separated clock stream.

Claim 23

A plurality of receiver for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams; and wherein said first means further includes a clock generator for supplying a center frequency signal to said phase locked recovery loop.

Claim 24

A plurality of receiver for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams; and wherein said first means further includes a clock generator for supplying a center frequency signal to said phase locked recovery loop.

Claim 25

Apparatus as set forth in claim 15 wherein said clock generator further comprises: (a) a master frequency source; (b) a phase locked loop connected to said master frequency source; and (c) a master counter connected to said phase locked loop, for outputting said center frequency signal to said recover loop.

Claim 26

Apparatus as set forth in claim 16 wherein said master frequency source is a crystal oscillator.

Claim 27

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; wherein said first means of each receiver is authorized and enabled to capture said input signal only in response to the presence of a catch authorization signal input to the receiver; wherein said first means of each receiver is further operable to generate a signal indicating the capture of said input signal; and wherein the signal indicating the capture of data by a first one of said plurality of receivers is used as the catch authorization signal for a second one of said plurality of receivers.

Claim 28

A plurality of receivers for converting serial pattern data input signals, received over a common synchronous serial transmission media, to a plurality of parallel data pattern output signals which correspond to said input signals, each receiver being associated with one of said parallel data pattern output signals, wherein each receiver comprises: (a) means, including a first storage means, for capturing, from said media, synchronously transmitted encoded serial pattern data input signals corresponding to the parallel data pattern output signals associated with that receiver; (b) second means, including data decoding means, for decoding the captured input signals and for generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of only said parallel data pattern output signals associated with that receiver; wherein said first means of each receiver is authorized and enabled to capture said input signal only in response to the presence of a catch authorization signal input to the receiver; wherein said first means of each receiver is further operable to generate a signal indicating the capture of said input signal; and wherein the signal indicating the capture of data by a first one of said plurality of receivers is used as the catch authorization signal for a second one of said plurality of receivers.

Claim 29

Apparatus as set forth in claim 18 wherein said plurality of receivers are serially connected to form a cascaded chain of said receivers, and wherein each of said receivers in said cascaded chain of said receivers, synchronously enables the output of captured input signals upon the detection of a transmitted synchronization pattern from said media.

Claim 30

Apparatus as set forth in claim 19 wherein said cascaded chain of receivers serially capture said input signals such that an upstream receiver captures said input signals before a downstream receiver captures said input signals, and wherein an inverted output signal of the farthest downstream receiver serves as the catch authorization signal for the farthest upstream receiver in said chain, and wherein each receiver in said chain enables the output of captured input signals in response to the capture of data by the farthest downstream receiver.

Claim 31

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said first means of each receiver is further operable to output clock pulses suitable for synchronizing the operation of external devices with the operation of that receiver.

Claim 32

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said first means of each receiver is further operable to output clock pulses suitable for synchronizing the operation of external devices with the operation of that receiver.

Claim 33

Apparatus as set forth in claim 21 wherein said first means of each receiver is further operable to generate clock pulses for the internal synchronization of said receiver.

Claim 34

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said parallel data pattern outputs have a plurality of data output types, and wherein said second means of each receiver is further operable to identify said type of parallel data pattern outputs by destination oriented content.

Claim 35

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said parallel data pattern outputs have a plurality of data output types, and wherein said second means of each receiver is further operable to identify said type of parallel data pattern outputs by destination oriented content.

Claim 36

Apparatus as set forth in claim 23 wherein said second means of each receiver is further operable to internally, automatically, demultiplex said decoded data.

Claim 37

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said second means of each receiver is operable in response to a selected control signal indicative of data width, to decode each of said captured input signals as a function of the data width indicated.

Claim 38

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said second means of each receiver is operable in response to a selected control signal indicative of data width, to decode each of said captured input signals as a function of the data width indicated.

Claim 39

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signal and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop including a phase detector that ignores missing pulses.

Claim 40

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signal and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop including a phase detector that ignores missing pulses.

Claim 41

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop incorporating a master/slave oscillator arrangement.

Claim 42

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop incorporating a master/slave oscillator arrangement.

Claim 43

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop operating at the bit rate of said separated clock stream.

Claim 44

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; and wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams, said phase locked recovery loop operating at the bit rate of said separated clock stream.

Claim 45

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams; and wherein said first means further includes a clock generator for supplying a center frequency signal to said phase locked recovery loop.

Claim 46

Apparatus for converting serial pattern data input signals, representative of parallel data pattern input signals and received over a synchronous serial transmission media, to parallel data pattern output signals which correspond to said input signals, including at least one receiver wherein each receiver comprises: (a) first means, including a first storage means, for capturing synchronously transmitted encoded serial pattern data input signals from said media and for generating an external signal indicating the capture of said input signals; (b) second means, including data decoding means and demultiplexing means, for decoding and demultiplexing said captured input signals and generating the parallel data pattern output corresponding thereto; (c) third means, including parallel output means, for enabling the output of said parallel data pattern output signals; wherein said first means of each receiver includes a phase locked data recovery loop for separating said input signals into separate clock and data pattern streams; and wherein said first means further includes a clock generator for supplying a center frequency signal to said phase locked recovery loop.

Claim 47

Apparatus as set forth in claim 29 wherein said clock generator further comprises: (a) a master frequency source; (b) a phase locked loop connected to said master frequency source; and (c) a master counter connected to said phase locked loop, for outputting said center frequency signal to said recover loop.

Claim 48

Apparatus as set forth in claim 30 wherein said master frequency source is a crystal oscillator.

Claim 51

The method according to claim 32 wherein the output enabling step comprises the steps of: detecting a transmitted synchronization pattern from said transmission media; and simultaneously enabling the output of said parallel data pattern output signals in response to the detection of said synchronization signal.

Claim 52

The method according to claim 33 further comprising the steps of: connecting the plurality of receivers into a cascaded chain; serially capturing the input signals by the plurality of receivers such that an upstream receiver captures the input signals before a downstream receiver captures the input signals; inverting the signal indicating the capture of data by the farthest downstream receiver in the cascaded chain; and using the inverted signal as the catch authorization signal for the farthest upstream receiver in said chain.

Claim 53

The method according to claim 34 wherein the output enabling step further comprises the step of enabling the output of the parallel data pattern output signals in response to the capture of data by the farthest downstream receiver.

Claim 56

The method according to claim 36 wherein the parallel data pattern outputs have a plurality of data output types, and further comprising the step of identifying said type of parallel data pattern outputs by destination-oriented content.

Claim 63

The method according to claim 40 wherein the parallel data pattern outputs have a plurality of data output types, and further comprising the step of identifying said type of parallel data pattern outputs by destination-oriented content.