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US5073778A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital to analog converter with dither using two parallel paths

Assignee: Sony Corp
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Filing: 1989-10-30
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Granted: 1991-12-17
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Expires: 2009-10-30
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Abstract

Abstract A signal processing apparatus reduces the quantization noise by using so-called noise shaping circuits. The input signal may be audio or video signals. One of the noise shaping circuits is supplied with a signal which is the relative addition of the input signal and a dither while the other noise shaping circuit is supplied with a signal which is the relative subtraction of the input signal and the dither. The signal components of the outputs of the noise shaping circuits are effectively combined to cancel the dither components to produce an output with an improved S/N ratio. A plurality of such signal processing apparatus may be arranged in parallel, in which case different dithers are used in the respective signal processing apparatus and the outputs of the respective signal processing apparatus are combined to further improve the S/N ratio.

Inventors

  • 👤 Masaaki Ueki
  • 👤 Nobuyuki Yasuda
  • 👤 Toshihiko Masuda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 08:20
CPC Classifications
H; H04; H04B; H04B14/00; H04B14/02; H04B14/04; H04B14/046

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 153 words
Signal processing apparatus comprising a plurality of signal processing circuits to each of which an input signal is supplied in parallel, each of said signal processing circuits comprising a dither generator for generating a dither signal, means for forming an addition signal representing a relative addition of said input signal and said dither signal, means for forming a subtraction signal representing a relative subtraction between said input signal and said dither signal, a first noise shaping circuit to which said addition signal is supplied, a second noise shaping circuit to which said subtraction signal is supplied, first combining means for effectively combining respective components of output signals of said first and second noise shaping circuits, and second combining means for combining the outputs of said signal processing circuits, further comprising an n number of said signal processing circuits and gain control means for attenuating the output of said second combining means by 1/n.
Claim 2
Dependent Claim 153 words
Signal processing apparatus comprising a plurality of signal processing circuits to each of which an input signal is supplied in parallel, each of said signal processing circuits comprising a dither generator for generating a dither signal, means for forming an addition signal representing a relative addition of said input signal and said dither signal, means for forming a subtraction signal representing a relative subtraction between said input signal and said dither signal, a first noise shaping circuit to which said addition signal is supplied, a second noise shaping circuit to which said subtraction signal is supplied, first combining means for effectively combining respective components of output signals of said first and second noise shaping circuits, and second combining means for combining the outputs of said signal processing circuits, further comprising an n number of said signal processing circuits and gain control means for attenuating the output of said second combining means by 1/n.
Claim 3
Dependent Claim 30 words
Signal processing apparatus according to claim 1 wherein said first combining means comprises an adder for adding the outputs of said first and second noise shaping circuits to each other.
Claim 4
Dependent Claim 25 words
Signal processing apparatus according to claim 1 wherein said subtraction signal is the sum of an inversion of said input signal and said dither signal.
Claim 5
Dependent Claim 34 words
Signal processing apparatus according to claim 3 wherein said first combining means comprises a subtractor for subtracting the output of said second noise shaping circuit from the output of said first noise shaping circuit.
Claim 6
Dependent Claim 18 words
Signal processing apparatus according to claim 1 wherein each of said dither generators generates a separate dither signal.

References Cited (Backward Citations)

JPS5148214A Cited
US4467316A Cited
US4542369A Cited
US4853780A Cited
US4864305A Cited
US4968987A Cited
US4937576A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-12-16 1995-06-17 1995-12-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-12-16 1999-06-17 1999-12-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-12-16 2003-06-17 2003-12-17 $7700.00 Window Closed / Lapsed

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