Fabrication method of contact window in semiconductor device

Claim 1

A fabrication method of contact windows in semiconductor devices, comprising the steps of: (a) defining a switching transistor region on a semiconductor substrate by forming a field oxide layer at a predetermined portion; (b) forming a gate oxide layer, a polysilicon layer, a protective oxide layer, and an etching-stop layer sequentially on said transistor region and said field oxide layer; (c) forming spacers at side walls of said polysilicon layer; (d) forming a conductive diffusion region of a conductivity type different from that of said semiconductor substrate in the switching transistor region; (e) thereafter depositing an oxide layer over the entire surface including said diffusion region and said etching-stop layer; and (f) etching said oxide layer on said diffusion region to provide a window through said oxide layer overlying said diffusion region while said etching-stop layer is in place.

Claim 7

A method of manufacturing semiconductor devices, comprising the steps of: (a) defining a switching transistor region on a semiconductor substrate by forming a field oxide layer at a predetermined portion; (b) forming a gate oxide layer, a first polysilicon layer, a first protective oxide layer, and a first etching-stop layer sequentially on said transistor region and said field oxide layer; (c) forming first spacers at side walls of said first polysilicon layer; (d) forming first and second conductive diffusion regions in said transistor region differently from that of the semiconductor substrate; (e) forming a first oxide interlayer on the entire surface; (f) forming a first contact window by removing said first oxide interlayer on said first diffusion region from a predetermined portion according to a self-alignment method; (g) forming a second polysilicon layer, a second protective oxide layer and a second etching-stop layer sequentially on said first diffusion layer; (h) forming a second polysilicon layer, a second protective oxide layer, and a second etching-stop layer sequentially on said first contact window; (i) forming second spacers at side walls of said second polysilicon layer; (j) forming a second contact window by removing said first and second oxide layers on said second diffusion region from a predetermined portion using the self-alignment method; and (k) forming a third polysilicon layer, an isolating layer and a fourth polysilicon layer sequentially on said second contact window.

Claim 8

A method of manufacturing semiconductor devices, comprising the steps of: (a) defining a switching transistor region on a semiconductor substrate by forming a field oxide layer at a predetermined portion; (b) forming a gate oxide layer, a first polysilicon layer, a first protective oxide layer, and a first etching-stop layer sequentially on said transistor region and said field oxide layer; (c) forming first spacers at side walls of said first polysilicon layer; (d) forming first and second conductive diffusion regions in said transistor region differently from that of the semiconductor substrate; (e) forming a first oxide interlayer on the entire surface; (f) forming a first contact window by removing said first oxide interlayer on said first diffusion region from a predetermined portion according to a self-alignment method; (g) forming a second polysilicon layer, a second protective oxide layer and a second etching-stop layer sequentially on said first diffusion layer; (h) forming a second polysilicon layer, a second protective oxide layer, and a second etching-stop layer sequentially on said first contact window; (i) forming second spacers at side walls of said second polysilicon layer; (j) forming a second contact window by removing said first and second oxide layers on said second diffusion region from a predetermined portion using the self-alignment method; and (k) forming a third polysilicon layer, an isolating layer and a fourth polysilicon layer sequentially on said second contact window.