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US5072271A
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US
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Protection circuit for use in semiconductor integrated circuit device
Assignee: Toshiba Corp
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Filing: 1990-08-06
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Granted: 1991-12-10
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Expires: 2010-08-06
Abstract
Abstract A protection circuit is inserted between a signal input pad and an internal circuit. The protection circuit includes a parasitic bipolar transistor which is obtained by forming high-impurity concentration semiconductor regions in the major-surface region of a substrate. In practice, it is hard to provide a parasitic bipolar transistor of a sufficiently large size, since the reduction of the size of a chip is a recent trend. With this in mind, a third semiconductor region serving as an electron-trapping region is formed in a region outside of the location where the parasitic bipolar transistor is formed. If an excessive voltage produced by ESD or the like is applied to the pad, and the excessive voltage uncontrollable by the parasitic bipolar transistor, the third semiconductor region absorbs the excessive voltage. In particular, where the current capacity of the parasitic bipolar transistor is small, the third semiconductor region reliably prevents electrostatic destruction of a circuit element. Accordingly, the protection circuit enables the parasitic bipolar transistor to be reduced in size, thus contributing to miniaturization of a chip. Moreover, the protection circuit is reliable in operation.
Inventors
- 👤 Mitsuru Shimizu
- 👤 Yoshio Okada
- 👤 Kiyofumi Sakurai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 02:08
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10D89/711; H10D89/211; H10D89/311
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
161 words
A protection circuit for a semiconductor integrated circuit device having an active element formed in a semiconductor body of a first conductivity type, said protection circuit comprising: an input-protecting bipolar transistor including: a collector comprising a first semiconductor region of a second conductivity type formed in a major surface of said semiconductor body and connected to an external terminal; an emitter comprising a second semiconductor region of said second conductivity type formed in said major surface of said semiconductor body and biased up to a predetermined potential; and a base region comprising a portion of said semiconductor body which is located between said collector and emitter; and a third semiconductor region of said first conductivity type and formed between said active element and that one of said first and second semiconductor regions which is located closer to said active element, wherein said third semiconductor region absorbs charge to said device which may be beyond the protective capabilities of input-protecting bipolar transistor.
Claim 2
Dependent Claim
161 words
A protection circuit for a semiconductor integrated circuit device having an active element formed in a semiconductor body of a first conductivity type, said protection circuit comprising: an input-protecting bipolar transistor including: a collector comprising a first semiconductor region of a second conductivity type formed in a major surface of said semiconductor body and connected to an external terminal; an emitter comprising a second semiconductor region of said second conductivity type formed in said major surface of said semiconductor body and biased up to a predetermined potential; and a base region comprising a portion of said semiconductor body which is located between said collector and emitter; and a third semiconductor region of said first conductivity type and formed between said active element and that one of said first and second semiconductor regions which is located closer to said active element, wherein said third semiconductor region absorbs charge to said device which may be beyond the protective capabilities of input-protecting bipolar transistor.
Claim 3
Dependent Claim
30 words
A protection circuit according to claim 1, wherein said semiconductor body is a semiconductor substrate, and said first and second semiconductor regions are impurity regions having a high impurity concentration.
Claim 4
Dependent Claim
44 words
A protection circuit according to claim 1, wherein said semiconductor body is a well region formed in a major surface of a semiconductor substrate of said second conductivity type, and said first and second semiconductor regions are impurity regions having a high impurity concentration.
Claim 5
Dependent Claim
30 words
A protection circuit according to claim 1, wherein said external terminal to which the first semiconductor region is connected comprises an input pad from which an external signal is input.
Claim 6
Dependent Claim
32 words
A protection circuit according to claim 1, wherein said second semiconductor region includes a plurality of second semiconductor portions, which are selectively connected to a power supply terminal or a grounded terminal.
Claim 7
Dependent Claim
28 words
A protection circuit according to claim 1, wherein said third semiconductor region is an impurity region having a high impurity concentration and which functions as an electron-trapping region.
Claim 8
Dependent Claim
17 words
A protection circuit according to claim 1, wherein said third semiconductor region surrounds said input-protecting bipolar transistor.
Claim 9
Dependent Claim
161 words
A protection circuit for a semiconductor integrated circuit device having an active element formed in a semiconductor body of a first conductivity type, said protection circuit comprising: an input-protecting bipolar transistor including: a collector comprising a first semiconductor region of a second conductivity type formed in a major surface of said semiconductor body and biased to a firs potential; an emitter comprising a second semiconductor region of said second conductivity type formed in said major surface of said semiconductor body and biased to a second potential; and a base region comprising a portion of said semiconductor body which is located between said collector and emitter; and a third semiconductor region of said first conductivity type and formed between said active element and that one of said first and second semiconductor regions which is located closer to said active element, wherein said third semiconductor region absorbs charge to said device which may be beyond the protective capabilities of the input-protecting bipolar transistor.
Claim 10
Dependent Claim
161 words
A protection circuit for a semiconductor integrated circuit device having an active element formed in a semiconductor body of a first conductivity type, said protection circuit comprising: an input-protecting bipolar transistor including: a collector comprising a first semiconductor region of a second conductivity type formed in a major surface of said semiconductor body and biased to a firs potential; an emitter comprising a second semiconductor region of said second conductivity type formed in said major surface of said semiconductor body and biased to a second potential; and a base region comprising a portion of said semiconductor body which is located between said collector and emitter; and a third semiconductor region of said first conductivity type and formed between said active element and that one of said first and second semiconductor regions which is located closer to said active element, wherein said third semiconductor region absorbs charge to said device which may be beyond the protective capabilities of the input-protecting bipolar transistor.
Claim 11
Dependent Claim
30 words
A protection circuit according to claim 8, wherein said semiconductor body is a semiconductor substrate, and said first and second semiconductor regions are impurity regions having a high impurity concentration.
Claim 12
Dependent Claim
44 words
A protection circuit according to claim 8, wherein said semiconductor body is a well region formed in a major surface of a semiconductor substrate of said second conductivity type, and said first and second semiconductor regions are impurity regions having a high impurity concentration.
Claim 13
Dependent Claim
28 words
A protection circuit according to claim 8, wherein said third semiconductor region is an impurity region having a high impurity concentration and which functions as an electron-trapping region.
Claim 14
Dependent Claim
24 words
A protection circuit according to claim 8, wherein said first potential is a power supply potential, and said second potential is a ground potential.
Claim 15
Dependent Claim
53 words
A protection circuit according to claim 12, wherein said first semiconductor region includes a plurality of first semiconductor portions and said second semiconductor region includes a plurality of second semiconductor portions, said first and second semiconductor portions being alternately arranged on said semiconductor body and separated from each other by a predetermined distance.
Claim 16
Dependent Claim
17 words
A protection circuit according to claim 8, wherein said third semiconductor region surrounds said input-protecting bipolar transistor.
Claim 17
Dependent Claim
21 words
A protection circuit according to claim 1, wherein said first conductivity type is p-type and said second conductivity type is n-type.
Claim 18
Dependent Claim
20 words
A protection circuit according to claim 8, wherein said first conductivity type is p-type and said second conductivity is n-type.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-12-09 | 1995-06-10 | 1995-12-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-12-09 | 1999-06-10 | 1999-12-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-12-09 | 2003-06-10 | 2003-12-10 | $7700.00 | Window Closed / Lapsed |