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US5070384A Expired / Lapsed US ⏱️ 0.0 years remaining

Electrically programmable antifuse element incorporating a dielectric and amorphous silicon interlayer

Assignee: Microsemi SoC Corp
•
Filing: 1990-04-12
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Granted: 1991-12-03
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Expires: 2010-04-12
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Abstract

Abstract An electrically programmable antifuse element incorporates a composite interlayer of dielectric material and amorphous silicon interposed between two electrodes. The lower electrode may be formed from a refractory metal such as tungsten. Preferably, a thin layer of titanium is deposited over the tungsten layer and its surface is then oxidized to form a thin layer of titanium oxide which serves as the dielectric material of the composite dielectric/amorphous silicon interlayer. A layer of amorphous silicon is then deposited on top of the titanium oxide dielectric to complete the formation of the composite interlayer. A topmost layer of a refractory metal such as tungsten is then applied over the amorphous silicon to form the topmost electrode of the antifuse.

Inventors

  • 👤 John L. McCollum
  • 👤 Shih-ou Chen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 02:49
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491; H10W20/41; H10W20/425

Claims Analysis

Total Claims: 43
Claim 1
Independent Claim 45 words
An electrically programmable antifuse element disposed on a semiconductor substrate in an integrated circuit comprising: a first electrode, a dielectric layer disposed over said first electrode, an amorphous silicon layer disposed over said dielectric layer, a second electrode disposed over said layer of amorphous silicon.
Claim 2
Dependent Claim 45 words
An electrically programmable antifuse element disposed on a semiconductor substrate in an integrated circuit comprising: a first electrode, a dielectric layer disposed over said first electrode, an amorphous silicon layer disposed over said dielectric layer, a second electrode disposed over said layer of amorphous silicon.
Claim 3
Dependent Claim 26 words
The electrically programmable antifuse element of claim 1 further including a layer of arsenic doped polysilicon in between said dielectric layer and said amorphous silicon layer.
Claim 4
Dependent Claim 35 words
The electrically programmable antifuse element of claim 1 wherein said first electrode is electrically connected to a diffusion region within said substrate, said diffusion region having a conductivity type opposite to that of said substrate.
Claim 5
Dependent Claim 35 words
The electrically programmable antifuse element of claim 2 wherein said first electrode is electrically connected to a diffusion region within said substrate, said diffusion region having a conductivity type opposite to that of said substrate.
Claim 6
Dependent Claim 33 words
The electrically programmable antifuse element of claim 1 wherein said first electrode includes a composite layer comprising a first layer of a refractory metal and a layer of titanium over said first layer.
Claim 7
Dependent Claim 33 words
The electrically programmable antifuse element of claim 2 wherein said first electrode includes a composite layer comprising a first layer of a refractory metal and a layer of titanium over said first layer.
Claim 8
Dependent Claim 33 words
The electrically programmable antifuse element of claim 3 wherein said first electrode includes a composite layer comprising a first layer of a refractory metal and a layer of titanium over said first layer.
Claim 9
Dependent Claim 33 words
The electrically programmable antifuse element of claim 4 wherein said first electrode includes a composite layer comprising a first layer of a refractory metal and a layer of titanium over said first layer.
Claim 10
Dependent Claim 25 words
The electrically programmable antifuse element of claim 7 wherein said layer of titanium has a thickness in a range from 100 Å to 1,000 Å.
Claim 11
Dependent Claim 25 words
The electrically programmable antifuse element of claim 8 wherein said layer of titanium has a thickness in a range from 100 Å to 1,000 Å.
Claim 12
Dependent Claim 18 words
The electrically programmable antifuse element of any one of claims 1-10 wherein said dielectric layer is titanium oxide.
Claim 13
Dependent Claim 32 words
The electrically programmable antifuse element of any one of claims 1-10 wherein said dielectric layer is titanium oxide having a thickness in the range of from about 50 Å to 150 Å.
Claim 14
Dependent Claim 24 words
The electrically programmable antifuse element of claim 1 wherein said amorphous silicon layer has a thickness of from about 1,000 Å to 2,500 Å.
Claim 15
Dependent Claim 24 words
The electrically programmable antifuse element of claim 2 wherein said amorphous silicon layer has a thickness of from about 1,000 Å to 2,500 Å.
Claim 16
Dependent Claim 26 words
The electrically programmable antifuse element of claim 1 wherein said second electrode comprises a refractory metal having a thickness of from 1,000 Å to 2 microns.
Claim 17
Dependent Claim 26 words
The electrically programmable antifuse element of claim 1 wherein said second electrode comprises a refractory metal having a thickness of from 1,000 Å to 2 microns.
Claim 18
Dependent Claim 27 words
The electrically programmable antifuse element of claim 2 wherein said layer of arsenic-doped polysilicon has a thickness in the range of from between 500 and 2,500 Å.
Claim 19
Dependent Claim 58 words
A semiconductor device disposed on a semiconductor substrate including a plurality of electrically programmable low impedance antifuse elements, each of said antifuse elements comprising: a first electrode provided over said substrate, a dielectric layer disposed above said first electrode, an amorphous silicon layer disposed above said dielectric layer, a second electrode provided over said layer of amorphous silicon.
Claim 20
Dependent Claim 58 words
A semiconductor device disposed on a semiconductor substrate including a plurality of electrically programmable low impedance antifuse elements, each of said antifuse elements comprising: a first electrode provided over said substrate, a dielectric layer disposed above said first electrode, an amorphous silicon layer disposed above said dielectric layer, a second electrode provided over said layer of amorphous silicon.
Claim 21
Dependent Claim 35 words
The semiconductor device of claim 18 wherein each of said plurality of electrically programmable antifuse elements of further includes a layer of arsenic doped polysilicon in between said dielectric layer and said amorphous silicon layer.
Claim 22
Dependent Claim 43 words
The semiconductor device of claim 18 wherein said first electrode of each of said plurality of electrically programmable antifuse elements is electrically connected to a diffusion region within said substrate, said diffusion region having a conductivity type opposite to that of said substrate.
Claim 23
Dependent Claim 43 words
The semiconductor device of claim 19 wherein said first electrode of each of said plurality of electrically programmable antifuse elements is electrically connected to a diffusion region within said substrate, said diffusion region having a conductivity type opposite to that of said substrate.
Claim 24
Dependent Claim 41 words
The semiconductor device of claim 18 wherein said first electrode of each of said plurality of electrically programmable antifuse elements includes a composite layer comprising a first layer of a refractory metal and a layer of titanium over said first layer.
Claim 25
Dependent Claim 41 words
The semiconductor device of claim 19 wherein said first electrode of each of said plurality of electrically programmable antifuse elements includes a composite layer comprising a first layer of a refractory metal and a layer of titanium over said first layer.
Claim 26
Dependent Claim 41 words
The semiconductor device of claim 20 wherein said first electrode of each of said plurality of electrically programmable antifuse elements includes a composite layer comprising a first layer of a refractory metal and a layer of titanium over said first layer.
Claim 27
Dependent Claim 41 words
The semiconductor device of claim 21 wherein said first electrode of each of said plurality of electrically programmable antifuse elements includes a composite layer comprising a first layer of a refractory metal and a layer of titanium over said first layer.
Claim 28
Dependent Claim 33 words
The semiconductor device of claim 22 wherein said layer of titanium in each of said plurality of electrically programmable antifuse elements has a thickness in a range from 100 Å to 1,000 Å.
Claim 29
Dependent Claim 33 words
The semiconductor device of claim 23 wherein said layer of titanium in each of said plurality of electrically programmable antifuse elements has a thickness in a range from 100 Å to 1,000 Å.
Claim 30
Dependent Claim 26 words
The semiconductor device of any one of claims 18-27 wherein said dielectric layer in each of said plurality of electrically programmable antifuse elements is titanium oxide.
Claim 31
Dependent Claim 40 words
The semiconductor device of any one of claims 11-27 wherein said dielectric layer in each of said plurality of electrically programmable antifuse elements is titanium oxide having a thickness in the range of from about 50 Å to 150 Å.
Claim 32
Dependent Claim 32 words
The semiconductor device of claim 18 wherein said amorphous silicon layer in each of said plurality of electrically programmable antifuse elements has a thickness of from about 1,000 Å to 2,500 Å.
Claim 33
Dependent Claim 32 words
The semiconductor device of claim 19 wherein said amorphous silicon layer in each of said plurality of electrically programmable antifuse elements has a thickness of from about 1,000 Å to 2,500 Å.
Claim 34
Dependent Claim 34 words
The semiconductor device of claim 18 wherein said second electrode of each of said plurality of electrically programmable antifuse elements comprises a refractory metal having a thickness of from 1,000 Å to 2 microns.
Claim 35
Dependent Claim 34 words
The semiconductor device of claim 19 wherein said second electrode of each of said plurality of electrically programmable antifuse elements comprises a refractory metal having a thickness of from 1,000 Å to 2 microns.
Claim 36
Dependent Claim 35 words
The semiconductor device of claim 19 wherein said layer of arsenic-doped polysilicon in each of said plurality of electrically programmable antifuse elements has a thickness in the range of from between 500 and 2,500 Å.
Claim 37
Dependent Claim 18 words
The electrically programmable antifuse element of claim 1 wherein said dielectric layer is a layer of silicon nitride.
Claim 38
Dependent Claim 28 words
The electrically programmable antifuse element of claim 35 wherein said layer of silicon nitride has a thickness in a range of from about 80 Å to 150 Å.
Claim 39
Dependent Claim 32 words
The electrically programmable antifuse element of claim 1 wherein said dielectric layer includes a first layer of silicon nitride, and a second layer of silicon dioxide over said layer of silicon nitride.
Claim 40
Dependent Claim 47 words
The electrically programmable antifuse element of claim 37 said first layer of silicon nitride and said second layer of silicon dioxide have thicknesses in the range of from about 25 Å to 50 Å and 40 Å to 80 Å, respectively, over said layer of silicon nitride.
Claim 41
Dependent Claim 32 words
The electrically programmable antifuse element of claim 1 wherein said dielectric layer includes a first layer of silicon dioxide, and a second layer of silicon nitride over said layer of silicon dioxide.
Claim 42
Dependent Claim 42 words
The electrically programmable antifuse element of claim 39 wherein said first layer of silicon dioxide and said second layer of silicon nitride have thicknesses in the range of from about 25 Å to 50 Å and 40 ↑1 to 80 Å, respectively.
Claim 43
Dependent Claim 28 words
The electrically programmable antifuse element of claim 35 wherein said layer of silicon nitride has a thickness in a range of from about 80 Å to 150 Å.

References Cited (Backward Citations)

US4748490A Cited
US4823181A Cited
US4899205A Cited
US4876220A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-12-02 1995-06-03 1995-12-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-12-02 1999-06-03 1999-12-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-12-02 2003-06-03 2003-12-03 $7700.00 Window Closed / Lapsed

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