Patent US5070029A successfully refreshed from Google Patents.
US5070029A
Expired / Lapsed
US
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Semiconductor process using selective deposition
Assignee: Motorola Solutions Inc
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Filing: 1991-02-04
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Granted: 1991-12-03
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Expires: 2011-02-04
Abstract
Abstract A process for fabricating semiconductor devices is disclosed which utilizes a selective deposition process to reduce the total number of process steps and especially the total number of photolithography steps required. In accordance with one embodiment of the invention a semiconductor substrate is provided having an insulating layer, a nucleating layer, and a second insulating layer overlaying the substrate. A photoresist mask is used as an implant mask and as an etch mask to expose a portion of nucleating layer. A second implant mask is formed by the selective deposition of tungsten or other material on the exposed nucleating layer. The selectively deposited material is then used to mask for a second ion implantation.
Inventors
- 👤 James R. Pfiester
- 👤 James D. Hayden
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 14:56
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D64/00; H10D64/01; H10D64/021; H10P; H10P30/00; H10P30/20; H10P30/22; H10P76/00; H10P76/40; Y; Y10; Y10S; Y10S148/00; Y10S148/105
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
139 words
A process for fabricating a semiconductor device comprising the steps of providing a semiconductor substrate; forming a first insulating layer overlaying said substrate; forming a nucleating layer overlaying said first insulating layer; forming a second insulating layer overlaying said nucleating layer; forming a first masking element overlaying selected portions of said second insulating layer; removing portions of said second insulating layer not overlaid by said first masking element using said first masking element as a removal mask and thereby exposing portions of said nucleating layer; implanting first ions into said substrate using said first masking element as an implantation mask; removing said first masking element; depositing by a process of selective deposition a second masking element onto said exposed portions of said nucleating layer; implanting second ions into said substrate using said second masking element as an implantation mask.
Claim 2
Dependent Claim
139 words
A process for fabricating a semiconductor device comprising the steps of providing a semiconductor substrate; forming a first insulating layer overlaying said substrate; forming a nucleating layer overlaying said first insulating layer; forming a second insulating layer overlaying said nucleating layer; forming a first masking element overlaying selected portions of said second insulating layer; removing portions of said second insulating layer not overlaid by said first masking element using said first masking element as a removal mask and thereby exposing portions of said nucleating layer; implanting first ions into said substrate using said first masking element as an implantation mask; removing said first masking element; depositing by a process of selective deposition a second masking element onto said exposed portions of said nucleating layer; implanting second ions into said substrate using said second masking element as an implantation mask.
Claim 3
Dependent Claim
30 words
The process of claim 1 wherein said step of forming a nucleating layer comprises the step of forming a layer selected from the group consisting of silicon, tungsten, and aluminum.
Claim 4
Dependent Claim
32 words
The process of claim 1 wherein said step of depositing by a process of selective deposition comprises selectively depositing a material selected from the group consisting of silicon, tungsten, copper, and aluminum.
Claim 5
Dependent Claim
192 words
A process for fabricating a semiconductor device comprising the steps of providing a semiconductor substrate; forming a first insulating layer overlaying said substrate; forming a nucleating layer overlaying said first insulating layer; forming a second insulating layer overlaying said nucleating layer; patterning said second insulating layer and thereby exposing portions of said nucleating layer; depositing by a process of selective deposition a first masking element onto said exposed portions of said nucleating layer; forming a second masking element overlaying a second portion of said second insulating layer; implanting first ions into said semiconductor substrate using said first and second masking elements as an implantation mask; removing said first masking element; implanting second ions into said semiconductor substrate using said second masking element as an implantation mask; removing those portions of said second insulating layer not overlaid by said second masking element to expose a second portion of said nucleating layer; depositing by a process of selective deposition a third masking element onto said exposed second portion of said nucleating layer; implanting third ions into said semiconductor substrate using said third masking element as an implantation mask; and removing said third masking element.
Claim 6
Dependent Claim
192 words
A process for fabricating a semiconductor device comprising the steps of providing a semiconductor substrate; forming a first insulating layer overlaying said substrate; forming a nucleating layer overlaying said first insulating layer; forming a second insulating layer overlaying said nucleating layer; patterning said second insulating layer and thereby exposing portions of said nucleating layer; depositing by a process of selective deposition a first masking element onto said exposed portions of said nucleating layer; forming a second masking element overlaying a second portion of said second insulating layer; implanting first ions into said semiconductor substrate using said first and second masking elements as an implantation mask; removing said first masking element; implanting second ions into said semiconductor substrate using said second masking element as an implantation mask; removing those portions of said second insulating layer not overlaid by said second masking element to expose a second portion of said nucleating layer; depositing by a process of selective deposition a third masking element onto said exposed second portion of said nucleating layer; implanting third ions into said semiconductor substrate using said third masking element as an implantation mask; and removing said third masking element.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-12-02 | 1995-06-03 | 1995-12-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-12-02 | 1999-06-03 | 1999-12-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-12-02 | 2003-06-03 | 2003-12-03 | $7700.00 | Window Closed / Lapsed |