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US5065225A Expired / Lapsed US ⏱️ 0.0 years remaining

Tunneling diffusion barrier for local interconnect and polysilicon high impedance device

Assignee: STMicroelectronics lnc USA
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Filing: 1990-07-31
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Granted: 1991-11-12
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Expires: 2010-07-31
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Abstract

Abstract A semiconductor device is described in which a conductive layer overlaps a dielectric layer forming a composite electrical device deposited over selected portions of a semiconductor substrate chemically isolating the conductive layer portion of the composite electrical device from the substrate, thereby preventing difffusion of dopant material through the dielectric layer into and out of the conductive layer while simultaneously allowing for tunneling of electrons through the dielectric layer to and from the conductive layer and the semiconductor substrate.

Inventors

  • 👤 Frank R. Bryant
  • 👤 John L. Walters

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 03:49
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/48; H10W20/01; H10W20/031; H10W20/0698; H10W20/41; H10W20/44; H10W20/4451

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 89 words
An interconnect of an integrated circuit comprising; a first silicon layer having a first conductivity type; an insulating layer disposed over the first silicon layer with an opening to expose selected regions in the first silicon layer; a barrier insulating layer covering exposed regions in the first silicon layer and portions of the insulating layer, wherein the barrier insulating layer has a thickness sufficient to facilitate conduction of electrons through the barrier layer; and, a second polysilicon layer having a second conductivity type disposed over the barrier insulating layer.
Claim 2
Dependent Claim 89 words
An interconnect of an integrated circuit comprising; a first silicon layer having a first conductivity type; an insulating layer disposed over the first silicon layer with an opening to expose selected regions in the first silicon layer; a barrier insulating layer covering exposed regions in the first silicon layer and portions of the insulating layer, wherein the barrier insulating layer has a thickness sufficient to facilitate conduction of electrons through the barrier layer; and, a second polysilicon layer having a second conductivity type disposed over the barrier insulating layer.
Claim 3
Dependent Claim 13 words
The device of claim 1, wherein the first silicon layer is a substrate.
Claim 4
Dependent Claim 12 words
The device of claim 1 wherein the first silicon layer is polysilicon.
Claim 5
Dependent Claim 14 words
The device of claim 1, wherein the second polysilicon layer is a silicided polysilicon.
Claim 6
Dependent Claim 38 words
The device of claim 1, wherein the barrier layer is silicon nitride with a thickness between approximately 5 to 50 Angstroms to prevent the diffusion of dopant material between the first silicon layer and the second polysilicon layer.
Claim 7
Dependent Claim 19 words
The device of claim 1, wherein the first conductivity type is n-type and the second conductivity type is p-type.
Claim 8
Dependent Claim 19 words
The device of claim 1, wherein the first conductivity type is p-type and the second conductivity type is n-type.

References Cited (Backward Citations)

US4937643A Cited
US4935804A Cited
US4641173A Cited
US4935801A Cited
US4935378A Cited
US4948755A Cited
US4939567A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-11-11 1995-05-13 1995-11-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-11-11 1999-05-13 1999-11-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-11-11 2003-05-13 2003-11-12 $7700.00 Window Closed / Lapsed

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