US4948755A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing self-aligned conformal metallization of semiconductor wafer by selective metal deposition
Assignee: Standard Microsystems LLC
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Filing: 1989-07-11
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Granted: 1990-08-14
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Expires: 2009-07-11
Abstract
Abstract A method is disclosed for fabricating a semiconductor integrated circuit which includes the selective deposition of a metal, such as tungsten, into a contact opening formed in a dielectric layer, followed by the deposition of a thin silicon layer over the dielectric and metal-filled opening and the deposition of a second dielectric layer over the thin silicon layer. An opening or trench is formed in the upper second dielectric layer using the silicon as an etch stop, and a metal such as tungsten is selectively deposited to fill the trench wherever the exposed silicon is present. In one embodiment of the invention, prior to the filling of the trench, the exposed silicon is reacted with a blanket layer of a metal to form a metal silicide layer at the lower surface of the trench.
Inventors
- 👤 Roy Mo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 12:52
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10W20/031; H10W20/056; H10W20/057; H10W20/074; Y; Y10; Y10S; Y10S438/00; Y10S438/97
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
194 words
A method for fabricating a semiconductor integrated circuit comprising the steps of providing a substrate, forming a first dielectric layer over an upper surface of said substrate, forming a contact hole in said first dielectric layer and extending to said upper surface of said substrate, selectively depositing a metal so as to fill said contact hole with said metal, forming a thin silicon layer overlying the remaining portion of said first dielectric layer and over said metal-filled contact hole, forming a second dielectric layer over said thin silicon layer, using said thin silicon layer as an etching stop, selectively removing portions of said second dielectric layer, thereby to form at lest one trench in said second dielectric layer overlying said metalfilled contact hole, and thereafter depositing a metal to fill said trench to substantially the upper surface of said second dielectric layer while at the same time consuming the portion of said thin silicon layer not protected by the remaining portion of said second dielectric layer, whereby said last-mentioned metal is in electrical contact with metal in said underlying contact hole and is substantially coplanar with the upper surface of said second dielectric layer.
Claim 2
Independent Claim
194 words
A method for fabricating a semiconductor integrated circuit comprising the steps of providing a substrate, forming a first dielectric layer over an upper surface of said substrate, forming a contact hole in said first dielectric layer and extending to said upper surface of said substrate, selectively depositing a metal so as to fill said contact hole with said metal, forming a thin silicon layer overlying the remaining portion of said first dielectric layer and over said metal-filled contact hole, forming a second dielectric layer over said thin silicon layer, using said thin silicon layer as an etching stop, selectively removing portions of said second dielectric layer, thereby to form at lest one trench in said second dielectric layer overlying said metalfilled contact hole, and thereafter depositing a metal to fill said trench to substantially the upper surface of said second dielectric layer while at the same time consuming the portion of said thin silicon layer not protected by the remaining portion of said second dielectric layer, whereby said last-mentioned metal is in electrical contact with metal in said underlying contact hole and is substantially coplanar with the upper surface of said second dielectric layer.
Claim 3
Dependent Claim
11 words
The method of claim 1, in which said metals are tungsten.
Claim 4
Dependent Claim
15 words
The method of claim 1, in which at least one of said metals is tungsten.
Claim 5
Dependent Claim
19 words
The method of claim 1, in which said thin silicon layer is between 50 and 2,500 Angstroms in thickness.
Claim 6
Dependent Claim
22 words
The method of claim 1, in which said thin silicon layer comprises one of a polycrystalline film and an amorphous silicon film.
Claim 7
Dependent Claim
17 words
The method of claim 1, in which said trench is between 0.3 to 2.5 microns in depth.
Claim 8
Dependent Claim
19 words
The method of claim 2, in which said tungsten metal is selectively deposited by means of chemical vapor deposition.
Claim 9
Dependent Claim
27 words
The method of claim 1, in which each of said dielectric layers comprises one of a silicon oxide film, a silicon nitride film, and an oxynitride film.
Claim 10
Dependent Claim
22 words
The method of claim 1, in which said first and second dielectric layers are each between 0.3 to 2.5 microns in thickness.
Claim 11
Dependent Claim
10 words
The method of claim 1, wherein said substrate is silicon.
Claim 12
Independent Claim
177 words
A method for fabricating a semiconductor integrated circuit comprising the steps of providing a substrate, forming a first dielectric layer over an upper surface of said substrate, forming a contact hole in said first dielectric layer and extending to said upper surface of said substrate, selectively depositing a metal so as to fill said contact hole with said metal, forming a thin silicon layer overlying the remaining portion of said first dielectric layer and over said metal-filled contact hole, forming a second dielectric layer over said thin silicon layer, using said silicon layer as an etching stop, selectively removing portions of said second dielectric layer thereby to form at least one trench in said second dielectric layer overlying said metal-filled contact hole, depositing a layer of a metal onto the exposed portion of said thin silicon layer and said upper surface of the remaining portion of said second dielectric layer, and reacting said lastmentioned metal with said thin silicon layer to form a metal silicide layer wherever said metal is in contact with said thin silicon layer.
Claim 13
Independent Claim
177 words
A method for fabricating a semiconductor integrated circuit comprising the steps of providing a substrate, forming a first dielectric layer over an upper surface of said substrate, forming a contact hole in said first dielectric layer and extending to said upper surface of said substrate, selectively depositing a metal so as to fill said contact hole with said metal, forming a thin silicon layer overlying the remaining portion of said first dielectric layer and over said metal-filled contact hole, forming a second dielectric layer over said thin silicon layer, using said silicon layer as an etching stop, selectively removing portions of said second dielectric layer thereby to form at least one trench in said second dielectric layer overlying said metal-filled contact hole, depositing a layer of a metal onto the exposed portion of said thin silicon layer and said upper surface of the remaining portion of said second dielectric layer, and reacting said lastmentioned metal with said thin silicon layer to form a metal silicide layer wherever said metal is in contact with said thin silicon layer.
Claim 14
Dependent Claim
15 words
The method of claim 11, in which at least one of said metals is tungsten.
Claim 15
Dependent Claim
25 words
The method of claim 12, in which said last-mentioned metal is selected from the group consisting of cobalt, titanium, platinum, tungsten, molybdenum, tantalum, and palladium.
References Cited (Backward Citations)
US4582563A
Cited
US4670967A
Cited
US4630357A
Cited
US4814285A
Cited
EP0224013A2
Cited
JPS647719A
Cited
US4764484A
Cited
JPH081539A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-08-13 | 1994-02-12 | 1994-08-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-08-13 | 1998-02-12 | 1998-08-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-08-13 | 2002-02-12 | 2002-08-14 | $7700.00 | Window Closed / Lapsed |