US4814285A
Expired / Lapsed
US
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Method for forming planarized interconnect level using selective deposition and ion implantation
Assignee: Intersil Corp
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Filing: 1987-02-27
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Granted: 1989-03-21
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Expires: 2007-02-27
Abstract
Abstract On the surface of a semiconductor structure containing portions to be selectively connected to an interconnection pattern, a thin conductive, uniform base layer, which promotes the growth of an interconnect conductor, is desposited. To define the interconnect structure, a thick layer of insulation material is selectively formed on the surface of the base layer with openings in the insulation layer exposing portions of the base layer that are to be connected to the interconnect layer. Next, on the portions of the base layer that are exposed by the openings in the insulation layer, a layer of interconnect metal, such as tungsten or gold, that effectively blocks the implantation of the ions through it, is selectively deposited to fill the openings in the insulation layer upon and even with the top surface of the insulation layer, so that the insulation layer and deposited metal are effectively planarized. The base layer which underlies the planarized insulator/interconnect metal layer is selectively converted to an insulator in those regions beneath the insulator but not beneath the interconnect metal by bombarding the entire structure with suitable conversion causing (e.g. oxygen or nitrogen) ions.
Inventors
- 👤 Dyer A. Matlock
- 👤 Richard L. Lichtel, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 01:31
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/057; H10W20/064; H10W20/065
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
127 words
A method of forming an interconnect pattern on the surface of a semiconductor structure having prescribed portions thereof to be conductively connected with said interconnect pattern comprising the steps of: (a) forming a first conductive layer on said surface of said semiconductor structure; (b) selectively forming a first insulator layer on said first conductive layer so as to expose surface areas of said first conductive layer whereat conductive contact with said interconnect pattern is desired; (c) forming a second conductive layer on the surface areas of said first conductive layer exposed in step (b); and (d) converting regions of said first conductive layer not exposed by step (b) into insulator material by implanting ions into said first conductive layer using saud second conductive layer as a mask.
Claim 2
Independent Claim
127 words
A method of forming an interconnect pattern on the surface of a semiconductor structure having prescribed portions thereof to be conductively connected with said interconnect pattern comprising the steps of: (a) forming a first conductive layer on said surface of said semiconductor structure; (b) selectively forming a first insulator layer on said first conductive layer so as to expose surface areas of said first conductive layer whereat conductive contact with said interconnect pattern is desired; (c) forming a second conductive layer on the surface areas of said first conductive layer exposed in step (b); and (d) converting regions of said first conductive layer not exposed by step (b) into insulator material by implanting ions into said first conductive layer using saud second conductive layer as a mask.
Claim 3
Dependent Claim
28 words
A method according to claim 1, wherein said second conductive layer is formed so as to be effectively coplanar with the top surface of said first insulator layer.
Claim 4
Dependent Claim
23 words
A method according to claim 2, wherein said second conductive layer comprises a metal selected from the group consisting of tungsten and gold.
Claim 5
Dependent Claim
41 words
A method according to claim 1, wherein step (d) further includes the step of heating said first conductive layer in said region in which ions have been implanted to form a second insulator layer contiguous with said first insulator layer thereon.
Claim 6
Dependent Claim
16 words
A method according to claim 1, wherein said first conductive layer comprises a layer of aluminum.
Claim 7
Dependent Claim
27 words
A method according to claim 1, wherein said first conductive layer comprises a layer of polycrystalline semiconductor material doped with an impurity of a prescribed conductivity type.
Claim 8
Dependent Claim
20 words
A method according to claim 1, wherein said ions include ions selected from the group consisting of oxygen and nitrogen.
Claim 9
Dependent Claim
17 words
A method according to claim 7, wherein said first conductive layer comprises a layer of polycrystalline silicon.
Claim 10
Independent Claim
165 words
A method of forming a planarized interconnect pattern on the surface of a semiconductor integrated circuit structure having portions thereof to be conductively connected with said interconnect pattern comprising the steps of: (a) forming a first conductive layer of uniform thickness on the surface of said semiconductor integrated circuit structure; (b) selectively forming a first insulator layer on said first conductive layer so as to expose surface areas of said first conductive layer whereat conductive contact between said portions of said structure and said interconnect pattern is desired; (c) forming a second conductive layer on the surface areas of said first conductive layer exposed in step (b) so as to be effectively coplanar with the top surface of said first insulator layer; and (d) converting regions of said first conductive area other than those on which said second conductive layer was formed in step (c) into the insulator material by implanting ions into said first conductive layer using said second conductive layer as a mask.
Claim 11
Independent Claim
165 words
A method of forming a planarized interconnect pattern on the surface of a semiconductor integrated circuit structure having portions thereof to be conductively connected with said interconnect pattern comprising the steps of: (a) forming a first conductive layer of uniform thickness on the surface of said semiconductor integrated circuit structure; (b) selectively forming a first insulator layer on said first conductive layer so as to expose surface areas of said first conductive layer whereat conductive contact between said portions of said structure and said interconnect pattern is desired; (c) forming a second conductive layer on the surface areas of said first conductive layer exposed in step (b) so as to be effectively coplanar with the top surface of said first insulator layer; and (d) converting regions of said first conductive area other than those on which said second conductive layer was formed in step (c) into the insulator material by implanting ions into said first conductive layer using said second conductive layer as a mask.
Claim 12
Dependent Claim
41 words
A method according to claim 9, wherein step (d) further includes the step of heating said first conductive layer in said regions in which ions have been implanted to form a second insulator layer contiguous with said first insulator layer thereon.
Claim 13
Dependent Claim
23 words
A method according to claim 10, wherein said second conductive layer comprises a metal selected from the group consisting of tungsten and gold.
Claim 14
Dependent Claim
16 words
A method according to claim 11, wherein said first conductive layer comprises a layer of aluminum.
Claim 15
Dependent Claim
17 words
A method according to claim 13, wherein said first conductive layer comprises a layer of polycrystalline silicon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-03-20 | 1992-09-19 | 1993-03-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-03-20 | 1996-09-19 | 1997-03-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-03-20 | 2000-09-19 | 2001-03-21 | $7700.00 | Window Closed / Lapsed |