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US5055417A
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Process for fabricating self-aligned high performance lateral action silicon-controlled rectifier and static random access memory cells
Assignee: National Semiconductor Corp
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Filing: 1988-12-15
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Granted: 1991-10-08
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Expires: 2008-12-15
Abstract
Abstract A process is described for fabricating a self-aligned lateral silicon-controlled rectifier circuit which includes the steps of forming an insulating layer 18 on a semiconductor substrate which includes an upper N-type region 12, 15 and a lower P-type region 10, and then forming an impurity mask 21 on the insulating layer 18. Portions of the insulating layer 18 adjacent the impurity mask 21 are then removed, and P conductivity type impurity 33 is introduced into the substrate 15 except where it is protected by the impurity mask 21. Finally, N-type impurity is introduced, also adjacent the impurity mask 21. When the structure is annealed, the impurity is diffused partially beneath the impurity mask to create a lateral SCR structure having a narrow PNP base width.
Inventors
- 👤 Osman E. Akcasu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:53
CPC Classifications
H; H10; H10D; H10D18/00; H10D18/251; Y; Y10; Y10T; Y10T428/00; Y10T428/24; Y10T428/24273; Y10T428/24281; Y10T428/24289
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
135 words
A method of fabricating a lateral silicon-controlled rectifier semiconductor structure comprising: forming a first insulating layer of first thickness on a semiconductor substrate, the substrate including an upper region of first conductivity type disposed on a lower region of opposite conductivity type; forming a first impurity mask on the first insulating layer over a first region of the substrate; removing at least part of the first insulating layer disposed over a second region of the substrate adjacent the first region; introducing opposite conductivity type impurity into the substrate except where overlaid by the first insulating layer to thereby form a spaced apart third and fourth regions; introducing first conductivity type impurity into the substrate into at least the second region; and providing electrical connections to the second region, the third region, and the fourth region.
Claim 2
Independent Claim
135 words
A method of fabricating a lateral silicon-controlled rectifier semiconductor structure comprising: forming a first insulating layer of first thickness on a semiconductor substrate, the substrate including an upper region of first conductivity type disposed on a lower region of opposite conductivity type; forming a first impurity mask on the first insulating layer over a first region of the substrate; removing at least part of the first insulating layer disposed over a second region of the substrate adjacent the first region; introducing opposite conductivity type impurity into the substrate except where overlaid by the first insulating layer to thereby form a spaced apart third and fourth regions; introducing first conductivity type impurity into the substrate into at least the second region; and providing electrical connections to the second region, the third region, and the fourth region.
Claim 3
Dependent Claim
17 words
A method as in claim 1 wherein the third region is disposed to surround the second region.
Claim 4
Dependent Claim
55 words
A method as in claim 2 wherein the step of removing further comprises removing at least part of the first thickness of the first insulating layer over a selected part of the third region, the selected part being a part of the third region where deeper penetration of the opposite conductivity type impurity is desired.
Claim 5
Dependent Claim
26 words
A method as in claim 2 wherein the substrate comprises silicon, the first insulating layer comprises silicon dioxide, and the first impurity mask comprises silicon nitride.
Claim 6
Dependent Claim
13 words
A method as in claim 4 wherein the first conductivity type is P.
Claim 7
Dependent Claim
38 words
A method as in claim 3 wherein the step of removing comprises: removing all of the first insulating layer over the second region and all of the first insulating layer over the selected part of the third region.
Claim 8
Dependent Claim
58 words
A method as in claim 6 wherein the step of removing at least part of the first thickness of the first insulating layer over a selected part of the third region comprises: removing all of the first insulating layer over the second region and all of the first insulating layer over the selected part of the third region.
Claim 9
Dependent Claim
20 words
A method as in claim 7 wherein the further insulating material is of second thickness less than the first thickness.
Claim 10
Dependent Claim
47 words
A method as in claim 2 wherein the step of removing further comprises removing at least part of the first thickness of the first insulating layer over a fifth region, the fifth region being spaced apart from the second region but also surrounded by the third region.
Claim 11
Dependent Claim
29 words
A method as in claim 9 wherein the step of introducing first conductivity type impurity into the substrate further comprises introducing first conductivity type impurity into the fifth region.
Claim 12
Dependent Claim
24 words
A method as in claim 2 wherein the upper region of the substrate comprises a lower portion more heavily doped than an upper portion.
Claim 13
Dependent Claim
27 words
A method as in claim 11 wherein the third and the fourth regions extend into the upper portion of the substrate and not into the lower portion.
Claim 14
Dependent Claim
49 words
A method as in claim 9 wherein prior to the step of forming a first impurity mask, first conductivity type impurity is introduced into a sixth region of the substrate separated from both the third and fourth regions to form a connection to the lower portion of the substrate.
Claim 15
Dependent Claim
58 words
A method as in claim 1 further comprising prior to the step of forming a first insulating layer the steps of: introducing a selected first conductivity type impurity into an opposite conductivity type silicon wafer to form a buried layer; and depositing a silicon layer of first conductivity type on the silicon wafer to thereby form the substrate.
Claim 16
Dependent Claim
24 words
A method as in claim 14 wherein the silicon layer is doped with a lesser quantity of first conductivity type than the buried layer.
Claim 17
Dependent Claim
36 words
A method as in claim 14 wherein the step of introducing a selected first conductivity type impurity further comprises introducing the selected impurity into all of the silicon wafer beneath the first, third and fourth regions.
Claim 18
Independent Claim
129 words
A method of fabricating a self-aligned lateral silicon-controlled rectifier circuit comprising: forming a first layer on a semiconductor substrate which includes an underlying P conductivity type region and an overlying N conductivity type region; forming a masking layer on the first layer over a first region of the substrate; removing at least part of the masking layer from over a second region and a third region of the substrate, the second and third regions being separated by the first region; introducing P conductivity type impurity into the substrate into the third region and a fourth region surrounding the second region; introducing N conductivity type impurity into the substrate into at least the second region; and forming electrical connections to the second region, the third region, and the fourth region.
Claim 19
Independent Claim
129 words
A method of fabricating a self-aligned lateral silicon-controlled rectifier circuit comprising: forming a first layer on a semiconductor substrate which includes an underlying P conductivity type region and an overlying N conductivity type region; forming a masking layer on the first layer over a first region of the substrate; removing at least part of the masking layer from over a second region and a third region of the substrate, the second and third regions being separated by the first region; introducing P conductivity type impurity into the substrate into the third region and a fourth region surrounding the second region; introducing N conductivity type impurity into the substrate into at least the second region; and forming electrical connections to the second region, the third region, and the fourth region.
References Cited (Backward Citations)
FR2358748A1
Cited
US4326135A
Cited
US4170501A
Cited
US4586073A
Cited
JPS55132862A
Cited
US4577397A
Cited
US4404737A
Cited
US4357622A
Cited
US4525922A
Cited
US4648909A
Cited
US4646117A
Cited
US4656495A
Cited
US4914496A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-10-07 | 1995-04-08 | 1995-10-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-10-07 | 1999-04-08 | 1999-10-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-10-07 | 2003-04-08 | 2003-10-08 | $7700.00 | Window Closed / Lapsed |