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US5047768A Expired / Lapsed US ⏱️ 0.0 years remaining

Data companding method and data compressor/expander

Assignee: Panasonic Holdings Corp
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Filing: 1990-04-26
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Granted: 1991-09-10
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Expires: 2010-04-26
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Abstract

Abstract A data companding method instantaneously compands the 14-bit digital audio signals to be outputted from a satellite broadcast receiver and so on is realized with the given conversion rule, which has a superior companding characteristics across the whole input range of the 14-bit data with SN being not deteriorated as compared with the 14-10 near-instantaneous companding law at the satellite broadcast transmission. A data compressor and a data expander in accordance with the present invention are realized by the construction of the combination of the coefficient table, a data shifter composed of a pluarlity of 4 to 1 data selectors, and an adder.

Inventors

  • 👤 Susumu Yamaguchi
  • 👤 Tetsuo Ishiwata

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 22:44
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; H; H03; H03M; H03M7/00; H03M7/30; H03M7/50

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 168 words
A data compressor for converting a 14-bit input signal to a 12-bit output signal, the 14-bit input having bits D13, D12, . . . ,D1, D0, and having a numberical value range of -8192 to +8191 in decimal notation, said data compressor comprising: a coefficient lookup table for receiving the five most significant bits D13 through D9 of the 14-bit input signal, and for outputting in accordance with a value of the thus received five most significant bits an offset value and a bit shift value; a data shifter for receiving the 14-bit input signal and the bit shift value output by said coefficient lookup table, and for conducting a bit shift operation on the 14-bit input signal in accordance with said bit shift value, and for outputting a thus bit shifted signal; and, an adder receiving and adding the offset value output by said coefficient table and the bit shifted signal output by said data shifter, the thus added result being output as the 12-bit output signal.
Claim 2
Dependent Claim 168 words
A data compressor for converting a 14-bit input signal to a 12-bit output signal, the 14-bit input having bits D13, D12, . . . ,D1, D0, and having a numberical value range of -8192 to +8191 in decimal notation, said data compressor comprising: a coefficient lookup table for receiving the five most significant bits D13 through D9 of the 14-bit input signal, and for outputting in accordance with a value of the thus received five most significant bits an offset value and a bit shift value; a data shifter for receiving the 14-bit input signal and the bit shift value output by said coefficient lookup table, and for conducting a bit shift operation on the 14-bit input signal in accordance with said bit shift value, and for outputting a thus bit shifted signal; and, an adder receiving and adding the offset value output by said coefficient table and the bit shifted signal output by said data shifter, the thus added result being output as the 12-bit output signal.
Claim 3
Dependent Claim 41 words
A data compressor as recited in claim 1, wherein said coefficient lookup table has stored therein a pair of predetermined offset and a bit shift values for each of a plurality of numerical value compression ranges of the 14-bit input signal.
Claim 4
Dependent Claim 85 words
A data compressor as recited in claim 2, wherein the plurality of numerical value compression ranges comprise in decimal notation (a) a first range of -8192 to -4097, (b) a second range of -4096 to -1025, (c) a third range of -1024 to -513, (d) a fourth range of -512 to -1, (e) a fifth range of 0 to +511, (f) a sixth range of +512 to +1023, (g) a seventh range of +1024 to +4095, and (h) an eighth range of +4096 to +8191.
Claim 5
Dependent Claim 85 words
A data compressor as recited in claim 2, wherein the plurality of numerical value compression ranges comprise in decimal notation (a) a first range of -8192 to -3073, (b) a second range of -3072 to -1537, (c) a third range of -1536 to -513, (d) a fourth range of -512 to -1, (e) a fifth range of 0 to +511, (f) a sixth range of +512 to +1535, (g) a seventh range of +1536 to +3071, and (h) an eighth range of +3072 to +8191.
Claim 6
Dependent Claim 171 words
A data expander for covering a 12- bit input signal to a 14-bit output signal, the 12-bit input signal having bits D11, D12, . . . , D1, D0, and having a numerical value range of -2048 to +2047 in decimal notation, said data expander comprising: a coefficient lookup table for receiving the five most significant bits D11 through D7 of the 12-bit input signal, and for outputting in accordance with a value of the thus received five most significant bits an offset value and a bit shift value; an adder for receiving and adding the 12-bit input signal and the offset value output by said coefficient table, and for outputting the thus added result as an added signal; a data shifter for receiving the bit shifter value output by said coefficient table and the added signal output by said adder, and for conducting a bit shift operation on the added signal in accordance with the bit shift signal, the thus bit shifted signal being output as the 14-bit output signal.
Claim 7
Dependent Claim 171 words
A data expander for covering a 12- bit input signal to a 14-bit output signal, the 12-bit input signal having bits D11, D12, . . . , D1, D0, and having a numerical value range of -2048 to +2047 in decimal notation, said data expander comprising: a coefficient lookup table for receiving the five most significant bits D11 through D7 of the 12-bit input signal, and for outputting in accordance with a value of the thus received five most significant bits an offset value and a bit shift value; an adder for receiving and adding the 12-bit input signal and the offset value output by said coefficient table, and for outputting the thus added result as an added signal; a data shifter for receiving the bit shifter value output by said coefficient table and the added signal output by said adder, and for conducting a bit shift operation on the added signal in accordance with the bit shift signal, the thus bit shifted signal being output as the 14-bit output signal.
Claim 8
Dependent Claim 39 words
A data expander as recited in claim 5, wherein said coefficient lookup table has stored therein a pair of predetermined offset and bit-shift values for each of a plurality of numerical value expansion ranges of the 12-bit input signal.
Claim 9
Dependent Claim 85 words
A data expander as recited in claim 6, wherein the plurality of numerical value expansion ranges comprise in decimal notation (a) a first range of -2048 to -1537, (b) a second range of -1536 to -769, (c) a third range of -768 to -513, (d) a fourth range of -512 to -1, (e) a fifth range of 0 to +511, (f) a sixth range of +512 to +767, (g) a seventh range of +768 to +1535, and (h) an eighth range of +1536 to +2067.
Claim 10
Dependent Claim 84 words
A data expander as recited in claim 6, wherein the plurality of numerical expansion ranges comprise in decimal notation (a) a first range of -2048 to -1409, (b) a second range of -1408 to -1025, (c) a third range of -1024 to -513, (d) a fourth range of -512 to -1, (e) a fifth range of 0 to +511, (f) a sixth range of +512 to +1023, (g) a seventh range of +1024 to 1407, and (h) an eighth range of +1408 to +2047.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-09-09 1995-03-11 1995-09-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-09-09 1999-03-11 1999-09-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-09-09 2003-03-11 2003-09-10 $7700.00 Window Closed / Lapsed

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