US4897653A
Expired / Lapsed
US
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Data outputting circuit
Assignee: Hitachi Ltd
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Filing: 1988-08-22
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Granted: 1990-01-30
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Expires: 2008-08-22
Abstract
Abstract A data outputting circuit including absolute value conversion circuit for converting digital data that is inputted with a determined sampling period into absolute value data, a register for storing the largest of the absolute value data provided within a predetermined period of time, a transferring register for receiving data and trransferring the data every predetermined period of time, and a compressing circuit adapted to compress compressing the data applied to the transferring register, whereby the circuit scale is reduced, and the data transferring time or the number of transferring lines is decreased.
Inventors
- 👤 Shin-ichi Wakumura
- 👤 Ichiro Miyake
- 👤 Hiroo Okamoto
- 👤 Yuuji Hatanaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 23:01
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/50; G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/544
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
147 words
A data outputting circuit comprising: absolute value conversion means for converting digital data into absolute value data, said digital data being input successively with a predetermined sampling period; data adjusting means including register means for comparing data corresponding to said absolute value data provided by said absolute value conversion means and storing the largest of said data corresponding to said absolute value data within a predetermined period of time; and transferring register means for receiving said data from said register means and transferring said data to a processing means every predetermined period of time; the improvement comprising: compression means included in said data adjusting means for compressing data into data with fewer bits; said compression means subjecting said absolute value data provided by said absolute value conversion means to logarithmic approximation and compressing said data applied from said absolute value conversion means to said transferring register means.
Claim 2
Dependent Claim
147 words
A data outputting circuit comprising: absolute value conversion means for converting digital data into absolute value data, said digital data being input successively with a predetermined sampling period; data adjusting means including register means for comparing data corresponding to said absolute value data provided by said absolute value conversion means and storing the largest of said data corresponding to said absolute value data within a predetermined period of time; and transferring register means for receiving said data from said register means and transferring said data to a processing means every predetermined period of time; the improvement comprising: compression means included in said data adjusting means for compressing data into data with fewer bits; said compression means subjecting said absolute value data provided by said absolute value conversion means to logarithmic approximation and compressing said data applied from said absolute value conversion means to said transferring register means.
Claim 3
Dependent Claim
210 words
A data outputting circuit comprising: absolute value conversion means for converting digital data into absolute value data, said digital data being input successively with a predetermined sampling period; data adjusting means including register means for comparing data corresponding to said absolute value data provided by said absolute value conversion means and storing the largest of said data corresponding to said absolute value data within a predetermined period of time; and transferring register means for receiving said data from said register means and transferring said data to a processing means every predetermined period of time; the improvement comprising: compression means included in said data adjusting means for compressing data into data with fewer bits; and an overflow detecting means for outputting an overflow signal to said transferring means when all of the bits of said absolute value data are detected to be at a high level; said compression means compressing said absolute value data provided by said absolute value conversion means into data with fewer bits; said register means storing the largest of said stored data provided by said compression means within a predetermined period of time; and said transferring register means receiving said data from said register means and transferring said data in synchronization with said predetermined period of time.
Claim 4
Dependent Claim
210 words
A data outputting circuit comprising: absolute value conversion means for converting digital data into absolute value data, said digital data being input successively with a predetermined sampling period; data adjusting means including register means for comparing data corresponding to said absolute value data provided by said absolute value conversion means and storing the largest of said data corresponding to said absolute value data within a predetermined period of time; and transferring register means for receiving said data from said register means and transferring said data to a processing means every predetermined period of time; the improvement comprising: compression means included in said data adjusting means for compressing data into data with fewer bits; and an overflow detecting means for outputting an overflow signal to said transferring means when all of the bits of said absolute value data are detected to be at a high level; said compression means compressing said absolute value data provided by said absolute value conversion means into data with fewer bits; said register means storing the largest of said stored data provided by said compression means within a predetermined period of time; and said transferring register means receiving said data from said register means and transferring said data in synchronization with said predetermined period of time.
Claim 5
Dependent Claim
156 words
A data outputting circuit comprising: absolute value conversion means for converting digital data into absolute value data, said digital data being input successively with a predetermined sampling period; data adjusting means including register means for comparing data corresponding to said absolute value data provided by said absolute value conversion means and storing the largest of said data corresponding to said absolute value data within a predetermined period of time; and transferring register means for receiving said data from said register means and transferring said data to a processing means every predetermined period of time; the improvement comprising: compression means included in said data adjusting means for compressing data into data with fewer bits; said compression means compressing said data applied from said absolute value conversion means to said transferring register means; and said processing means applying a clear signal to said register means after said transferring register means receives said stored data from said register means.
Claim 6
Dependent Claim
156 words
A data outputting circuit comprising: absolute value conversion means for converting digital data into absolute value data, said digital data being input successively with a predetermined sampling period; data adjusting means including register means for comparing data corresponding to said absolute value data provided by said absolute value conversion means and storing the largest of said data corresponding to said absolute value data within a predetermined period of time; and transferring register means for receiving said data from said register means and transferring said data to a processing means every predetermined period of time; the improvement comprising: compression means included in said data adjusting means for compressing data into data with fewer bits; said compression means compressing said data applied from said absolute value conversion means to said transferring register means; and said processing means applying a clear signal to said register means after said transferring register means receives said stored data from said register means.
Claim 7
Dependent Claim
75 words
A data outputting circuit as claimed in claim 3, wherein: said compression means compresses said absolute value data provided by said absolute value conversion means into data with fewer bits; said register means stores the largest of said stored data provided by said compression means within a predetermined period of time; and said transferring register means receives said data from said register means and transfers said data in synchronization with said predetermined period of time.
Claim 8
Dependent Claim
155 words
A data outputting circuit comprising: absolute value conversion means for converting digital data input successively with a predetermined sampling period into absolute value data; compressing means for compressing said absolute value data provided by said absolute value conversion means into data with fewer bits; register means for storing the largest of said data provided by said compressing means within a predetermined period of time; transferring register means for receiving said data from said register means and transferring said data to a processing means in synchronization with said predetermined period of time; and signal generating means for applying, in synchronization with said predetermined period of time, a data latch signal to said transferring register means to allow said transferring register means to latch said data stored in said register means, and a clear signal to said register means immediately after the application of said data latch signal to clear said data stored in said register means.
Claim 9
Dependent Claim
155 words
A data outputting circuit comprising: absolute value conversion means for converting digital data input successively with a predetermined sampling period into absolute value data; compressing means for compressing said absolute value data provided by said absolute value conversion means into data with fewer bits; register means for storing the largest of said data provided by said compressing means within a predetermined period of time; transferring register means for receiving said data from said register means and transferring said data to a processing means in synchronization with said predetermined period of time; and signal generating means for applying, in synchronization with said predetermined period of time, a data latch signal to said transferring register means to allow said transferring register means to latch said data stored in said register means, and a clear signal to said register means immediately after the application of said data latch signal to clear said data stored in said register means.
Claim 10
Dependent Claim
52 words
A data outputting circuit as claimed in claim 5, in which said signal generating means is a signal processing section in a rotary head type digital audio tape deck (R-DAT) which outputs said data latch signal and said clear signal every 1/2 frame in said rotary head type digital audio tape deck.
Claim 11
Dependent Claim
32 words
A data outputting circuit as claimed in claim 5, in which said compressing means comprises means for subjecting said absolute value data provided by said absolute value conversion means to logarithmic approximation.
Claim 12
Dependent Claim
42 words
A data outputting circuit as claimed in claim 5, further comprising: an overflow detecting means for outputting an overflow signal to said transferring means when all of the bits of said absolute value data are detected to be at a high level.
References Cited (Backward Citations)
US4682152A
Cited
US4728929A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-01-29 | 1993-07-31 | 1994-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-01-29 | 1997-07-31 | 1998-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-01-29 | 2001-07-31 | 2002-01-30 | $7700.00 | Window Closed / Lapsed |