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US5047766A Expired / Lapsed US ⏱️ 0.0 years remaining

Broad band signal switching matrix

Assignee: Siemens AG
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Filing: 1988-12-15
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Granted: 1991-09-10
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Expires: 2008-12-15
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Abstract

Abstract In a broad band signal spaced coupling device comprising a cross point matrix whose switching matrix elements are respectively controllable by a decoder-controlled, cross point-associated memory cell, the cross points are respectively formed with a complementary metal-oxide-semiconductor transfer gate and the useful signal input of each such gate is preceded by a complementary metal-oxide-semiconductor inverter.

Inventors

  • 👤 Ruediger Hofmann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 02:08
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/09425; H03K19/09429; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/52; H04Q3/521

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 128 words
A broadband switching matrix comprising: a plurality of row lines; a plurality of column lines; a plurality of select lines respectively associated with said row and column lines; said row and column lines intersecting to form a plurality of crosspoints; and at each crosspoint, a holding memory cell having inputs connected to select lines for the crosspoint, a complementary metal-oxide-semiconductor inverter and a complementary metal-oxide-semiconductor transfer gate having a controlled conductive path connected in series in the path connecting the row and column lines present at the crosspoint, the inverter having an output connected to the conductive path input of the transfer gate, and said transfer gate having control signal inputs connected to and controllable by said holding memory cell in response to signals on said select lines.
Claim 2
Dependent Claim 128 words
A broadband switching matrix comprising: a plurality of row lines; a plurality of column lines; a plurality of select lines respectively associated with said row and column lines; said row and column lines intersecting to form a plurality of crosspoints; and at each crosspoint, a holding memory cell having inputs connected to select lines for the crosspoint, a complementary metal-oxide-semiconductor inverter and a complementary metal-oxide-semiconductor transfer gate having a controlled conductive path connected in series in the path connecting the row and column lines present at the crosspoint, the inverter having an output connected to the conductive path input of the transfer gate, and said transfer gate having control signal inputs connected to and controllable by said holding memory cell in response to signals on said select lines.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-09-09 1995-03-11 1995-09-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-09-09 1999-03-11 1999-09-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-09-09 2003-03-11 2003-09-10 $7700.00 Window Closed / Lapsed

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