Abstract A sense amplifier circuit includes an amplifier including first and second inverter circuits which each have a pair of thin film transistors and are connected in a cross-coupled configuration, a precharging thin film transistor connected between the first and second inverter circuits, input transfer gates respectively connected between the first and second inverter circuits and first and second input terminals, and output transfer gate respectively connected between the first and second inverter circuits and first and second input terminals. With the above construction, the precharging thin film transistor is made active to precharge the amplifier and then the transfer gates are operated to permit an input signal to be input to the amplifier, thereby causing the input signal to be discriminated between two values and amplified.
A sense amplifier circuit using thin film transistors, comprising: an amplifier including first and second inverter circuits each having a pair of thin film transistors and means for connecting said first and second inverter circuits in a cross-coupled configuration; a precharging thin film transistor connected between said first and second inverter circuits; first and second input terminals; first and second signal input transfer gates respectively connected between said first and second inverter circuits and said first and second input terminals; first and second output terminals; and first and second signal output transfer gates respectively connected between said first and second inverter circuits and said first and second output terminals.
Claim 2
Dependent Claim
109 words
A sense amplifier circuit using thin film transistors, comprising: an amplifier including first and second inverter circuits each having a pair of thin film transistors and means for connecting said first and second inverter circuits in a cross-coupled configuration; a precharging thin film transistor connected between said first and second inverter circuits; first and second input terminals; first and second signal input transfer gates respectively connected between said first and second inverter circuits and said first and second input terminals; first and second output terminals; and first and second signal output transfer gates respectively connected between said first and second inverter circuits and said first and second output terminals.