US5034343A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Manufacturing ultra-thin wafer using a handle wafer
Assignee: Intersil Corp
•
Filing: 1990-03-08
•
Granted: 1991-07-23
•
Expires: 2010-03-08
Abstract
Abstract A process including bonding a first device wafer to a handle wafer by an intermediate bonding oxide layer and thinning the device wafer to not greater than 7 mils. An epitaxial device layer of under 1 mil may be added. Device formation steps are performed on a first surface of the first device wafer. This is followed by removing the handle wafer to produce a resulting wafer having substantially the thickness of the first device layer. To produce a silicon on insulator (SOI), a third device wafer is bonded to the first surface of the first device wafer by the intermediate oxide layer and the third wafer is thinned to not greater than 40 microns. The first and third device wafers form the resulting SOI wafer.
Inventors
- 👤 George V. Rouse
- 👤 Paul S. Reinecke
- 👤 Craig J. McLachlan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 11:27
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1914; H10W; H10W10/00; H10W10/10; H10W10/181; Y; Y10; Y10S; Y10S148/00; Y10S148/135
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
74 words
A method of fabricating integrated circuits in ultra thin wafers comprising: bonding a first device wafer to a handle wafer by an intermediate oxide layer and thinning said first device wafer to a desired wafer thickness of not greater than 7 mils; performing device formation steps on a first surface of said thinned first device wafer; and removing said handle wafer to produce a wafer having substantially the thickness of said first device wafer.
Claim 2
Independent Claim
74 words
A method of fabricating integrated circuits in ultra thin wafers comprising: bonding a first device wafer to a handle wafer by an intermediate oxide layer and thinning said first device wafer to a desired wafer thickness of not greater than 7 mils; performing device formation steps on a first surface of said thinned first device wafer; and removing said handle wafer to produce a wafer having substantially the thickness of said first device wafer.
Claim 3
Dependent Claim
20 words
A method according to claim 1 including performing device isolation step after said bonding step and before said removing step.
Claim 4
Dependent Claim
65 words
A method according to claim 2, wherein: said device isolation steps includes bonding a third device wafer to said first surface of said first device wafer by an intermediate oxide layer which forms part of said device isolation and thinning said third device wafer to no more than 40 microns and; said device formation steps are performed on the surface of said third device wafer.
Claim 5
Dependent Claim
24 words
A method according to claim 3, wherein said device isolation step includes introducing impurities into said third device wafer to form lateral junction isolation.
Claim 6
Dependent Claim
22 words
A method according to claim 3, wherein said device isolation step includes etching said third device wafer to form lateral dielectric isolation.
Claim 7
Dependent Claim
23 words
A method according to claim 2, wherein said device isolation step includes introducing impurities into said first device wafer to form junction isolation.
Claim 8
Dependent Claim
22 words
A method according to claim 2, wherein said device isolation step includes etching said first device wafer to form lateral dielectric isolation.
Claim 9
Dependent Claim
24 words
A method according to claim 2, wherein said device isolation steps include implanting oxygen to form a dielectric layer within said first device wafer.
Claim 10
Dependent Claim
40 words
A method according to claim 1, wherein removing said handle wafer includes grinding said handle wafer for a substantial portion of its thickness and etching the remaining portion of said handle wafer using said oxide layer as an etching stop.
Claim 11
Dependent Claim
31 words
A method according to claim 1 including forming an expitaxial layer on said first device layer after thinning under 1 mil, and performing said device formation steps on said epitaxial layer.
Claim 12
Dependent Claim
49 words
A method according to claim 10 wherein said epitaxial layer is formed of a second conductivity type opposite a first conductivity type of said first device wafer to form horizontal junction isolation; and including etching said epitaxial layer down to said first device layer to form lateral dielectric isolation.
Claim 13
Dependent Claim
57 words
A method according to claim 10 wherein said epitaxial layer is formed of a second conductivity type opposite a first conductivity type of said first device wafer to form horizontal junction isolation; and including introducing impurities of said first conductivity type into said epitaxial layer to form lateral junction isolation extending down to said first device wafer.
Claim 14
Independent Claim
105 words
A method of fabricating integrated circuits in ultra-thin wafers comprising: bonding a first device wafer to a handle wafer by a first intermediate oxide layer and thinning said first device wafer to not greater than 7 mils; bonding a third device wafer to said first device wafer by a second intermediate oxide layer and thinning the third wafer to less than 40 microns; performing device formation steps on a first surface of said third device wafer; and removing said handle wafer to produce a wafer having the thickness substantially of the combined first and third device wafers with device thickness defined by said third layer.
Claim 15
Independent Claim
105 words
A method of fabricating integrated circuits in ultra-thin wafers comprising: bonding a first device wafer to a handle wafer by a first intermediate oxide layer and thinning said first device wafer to not greater than 7 mils; bonding a third device wafer to said first device wafer by a second intermediate oxide layer and thinning the third wafer to less than 40 microns; performing device formation steps on a first surface of said third device wafer; and removing said handle wafer to produce a wafer having the thickness substantially of the combined first and third device wafers with device thickness defined by said third layer.
Claim 16
Dependent Claim
24 words
A method according to claim 13 including introducing impurities into said third device wafer to form lateral junction isolation before removing said handle wafer.
Claim 17
Dependent Claim
22 words
A method according to claim 13 including etching said third device wafer to form lateral dielectric isolation before removing said handle wafer.
Claim 18
Dependent Claim
40 words
A method according to claim 13, wherein removing said handle wafer includes grinding said handle wafer for a substantial portion of its thickness and etching the remaining portion of said handle wafer using said oxide layer as an etching stop.
References Cited (Backward Citations)
US3508980A
Cited
US3689357A
Cited
US4017341A
Cited
JPS51103672A
Cited
US4321747A
Cited
US4292730A
Cited
US4357180A
Cited
US4638552A
Cited
US4888304A
Cited
US4948748A
Cited
JPS6358817A
Cited
JPS63246841A
Cited
US4878957A
Cited
US4908328A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-07-22 | 1995-01-21 | 1995-07-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-07-22 | 1999-01-21 | 1999-07-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-07-22 | 2003-01-21 | 2003-07-23 | $7700.00 | Window Closed / Lapsed |