Annealing of ion-implanted GaAs and InP semiconductors

Claim 2

A process of annealing ion-implanted semiconductor material comprising the steps of: selecting an unannealed semiconductor material having an ion-implanted polished surface; selecting a like semiconductor material having a polished surface larger than that of the first-mentioned surface; positioning the unannealed semiconductor material in surface-to-surface contact with the larger surface which extends beyond the periphery of the smaller surface; maintaining the surfaces in contact; and annealing the ion-implanted semiconductor material substantially in the absence of oxygen whereby evaporation of material from the implanted surface is minimized.

Claim 3

A process of annealing an ion-implanted semiconductor material comprising: selecting an unannealed semiconductor material from the group consisting of GaAs and InP having a polished surface implanted with ions selected from the group consisting of Be + , 29Si + and Se + ; selecting a like semiconductor material having a surface area greater than the area of the ion-implanted surface and provided with a coating of dielectric material on the surface selected from the group consisting of Si 3 N 4 , SiO 2 and AlN polished to a smoothness substantially matching that of the first mentioned surface; positioning the surfaces in face-to-face contact with peripherial portions of the larger surface surrounding the, smaller surface; maintaining the surfaces in contact; and annealing the ion-implanted semiconductor material in an atmosphere of nitrogen and hydrogen whereby evaporation of material from the implanted surface is minimized.

Claim 4

A process of annealing an ion-implanted semiconductor material comprising: selecting an unannealed semiconductor material from the group consisting of GaAs and InP having a polished surface implanted with ions selected from the group consisting of Be + , 29Si + and Se + ; selecting a like semiconductor material having a surface area greater than the area of the ion-implanted surface and provided with a coating of dielectric material on the surface selected from the group consisting of Si 3 N 4 , SiO 2 and AlN polished to a smoothness substantially matching that of the first mentioned surface; positioning the surfaces in face-to-face contact with peripherial portions of the larger surface surrounding the, smaller surface; maintaining the surfaces in contact; and annealing the ion-implanted semiconductor material in an atmosphere of nitrogen and hydrogen whereby evaporation of material from the implanted surface is minimized.

Claim 5

The process according to claim 2 comprising a further step of selecting an annealing atmosphere of approximately 15% H 2 and 85% N 2 .

Claim 6

The process according to claim 2 or 3 comprising annealing the ion-implanted semiconductor material at a temperature of about 800°-1000° C. for about 15-20 minutes when the material is GaAs.

Claim 7

The process according to claim 2 or 3 comprising annealing the ion-implanted semiconductor material to a temperature of about 700°-800° C. for about 15-20 minutes when the material is InP.

Claim 8

A process of annealing a wafer of ion-implanted semiconductor material comprising the steps of: selecting an unannealed semiconductor wafer selected from the group consisting of GaAs and InP having a polished planar surface implanted with ions selected from the group consisting of Be + , 29Si + and Se + ; coating a Si matrix with a layer of dielectric material selected from the group consisting of Si 3 N 4 , SiO 2 and AlN; providing a polished planar surface on the dielectric material having an area larger than the area of the planar surface on the semiconductor wafer; positioning the polished surfaces together in face-to-face contact with excess area of the larger planar surface extending beyond the outer periphery of the smaller planar surface; maintaining the surfaces in face-to-face contact; planning the positioned materials into a container; purging the container to have an embient environment gas of approximately 15% H 2 and 85% N 2 ; placing the container in a furnace at an elevated temperature for a predetermined time; removing the container from the furnace and allowing the materials to cool to substantially room temperature; changing the ambient gas to N 2 ; and removing the annealed semiconductor.

Claim 9

A process of annealing a wafer of ion-implanted semiconductor material comprising the steps of: selecting an unannealed semiconductor wafer selected from the group consisting of GaAs and InP having a polished planar surface implanted with ions selected from the group consisting of Be + , 29Si + and Se + ; coating a Si matrix with a layer of dielectric material selected from the group consisting of Si 3 N 4 , SiO 2 and AlN; providing a polished planar surface on the dielectric material having an area larger than the area of the planar surface on the semiconductor wafer; positioning the polished surfaces together in face-to-face contact with excess area of the larger planar surface extending beyond the outer periphery of the smaller planar surface; maintaining the surfaces in face-to-face contact; planning the positioned materials into a container; purging the container to have an embient environment gas of approximately 15% H 2 and 85% N 2 ; placing the container in a furnace at an elevated temperature for a predetermined time; removing the container from the furnace and allowing the materials to cool to substantially room temperature; changing the ambient gas to N 2 ; and removing the annealed semiconductor.

Claim 10

The process according to claim 6 comprising the step of maintaining a GaAs ion-implanted semiconductor wafer at a temperature of 800°-1000° C. for about 15-20 minutes.

Claim 11

The process according to claim 6 comprising the step of maintaining an InP ion-implanted semiconductor wafer at a temperature of 700°-800° C. for about 15-20 minutes.