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US5027119A Expired / Lapsed US ⏱️ 0.0 years remaining

Noise shaping requantization circuit

Assignee: Victor Company of Japan Ltd
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Filing: 1990-06-05
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Granted: 1991-06-25
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Expires: 2010-06-05
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Abstract

Abstract In a noise shaping requantization circuit, a requantized output digital signal and an input digital signal are processed in an operational circuit whose output signal is requantized to provide the requantized output signal. The processing circuit can be configured in a variety of ways but has fixed limitations established for circuit parameters which determine the relationship between the output signal therefrom and the two input signals. By comparison with prior art noise shaping requantization circuits, a substantially better S/N ratio (assuming equal values of output signal resolution), or a substantially lower degree of output signal resolution (assuming equal values of S/N ratio) can be achieved, with stable operation.

Inventors

  • 👤 Kazuya Toyomaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 23:52
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/3002; H03M7/3004; H03M7/3015; H03M7/3031; H03M7/3042; H03M1/00; H03M1/66; H03M7/302; H03M7/3024; H03M7/3028

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 216 words
A noise shaping requantization circuit for converting an input digital signal, which has a high degree of resolution and has been generated using an original sampling frequency, to a requantized output digital signal having a lower degree of resolution that the input digital signal by using a resampling frequency that is higher than the original sampling frequency, comprising: input terminal means (1) coupled to receive said input digital signal; operational circuit means (3) coupled to receive said input digital signal from said input terminal means to produce an output signal; output terminal means (2); and quantizer circuit means (4) coupled to receive said output signal from said operational circuit means for producing said requantized output digital signal and for supplying said requantized output signal to said output terminal means and to said operational circuit means for producing an output signal A(z) from said operational circuit means; wherein, respectively expressing said input digital signal as X(z), said requantized output digital signal as Y(z), said output signal from said operational circuit means as A(z), and a unit delay time corresponding to a resampling period as z -1 , the signal A(z) is expressed as follows: ##EQU57## where respective constants b, c, d and e simultaneously satisfy all of the following relationships: b≧1/2,e≧0, d+e>0 b(d+e)(c+d+e)-b.sup.2 e-1.2(d+e).sup.2 >0 8b+4c+2d+e<15 8b+4c+2d<14+e.
Claim 2
Dependent Claim 216 words
A noise shaping requantization circuit for converting an input digital signal, which has a high degree of resolution and has been generated using an original sampling frequency, to a requantized output digital signal having a lower degree of resolution that the input digital signal by using a resampling frequency that is higher than the original sampling frequency, comprising: input terminal means (1) coupled to receive said input digital signal; operational circuit means (3) coupled to receive said input digital signal from said input terminal means to produce an output signal; output terminal means (2); and quantizer circuit means (4) coupled to receive said output signal from said operational circuit means for producing said requantized output digital signal and for supplying said requantized output signal to said output terminal means and to said operational circuit means for producing an output signal A(z) from said operational circuit means; wherein, respectively expressing said input digital signal as X(z), said requantized output digital signal as Y(z), said output signal from said operational circuit means as A(z), and a unit delay time corresponding to a resampling period as z -1 , the signal A(z) is expressed as follows: ##EQU57## where respective constants b, c, d and e simultaneously satisfy all of the following relationships: b≧1/2,e≧0, d+e>0 b(d+e)(c+d+e)-b.sup.2 e-1.2(d+e).sup.2 >0 8b+4c+2d+e<15 8b+4c+2d<14+e.
Claim 3
Dependent Claim 215 words
A noise shaping requantization circuit for converting an input digital signal, which has a high degree of resolution and has been generated using an original sampling frequency, to a requantized output digital signal having a lower degree of resolution than the input digital signal by using a resampling frequency that is higher than the original sampling frequency, comprising: input terminal means (1) coupled to receive said input digital signal; operational circuit means (3) coupled to receive said input digital signal from said input terminal, to produce an output signal; output terminal means (2); and quantizer circuit means (4) coupled to receive said output signal from said operational circuit means, for producing said requantized output digital signal and for supplying said requantized output signal to said output terminal means and to said operational circuit means for producing an output signal A(z) from said operational circuit means; wherein, respectively expressing said input digital signal as X(z), said requantized output digital signal as Y(z), said output signal from said operational circuit means as A(z), and a unit delay time corresponding to a resampling period as z -1 , the signal A(z) is expressed as follows: ##EQU58## where respective constants b, c, d and e simultaneously satisfy all of the following relationships: b≧1/2,e≧0, d+e>0 b(d+e)(c+d+e)-b.sup.2 e-1.2(d+e).sup.2 >0 8b+4c+2d+e<15 8b+4c+2d<14+e.
Claim 4
Dependent Claim 215 words
A noise shaping requantization circuit for converting an input digital signal, which has a high degree of resolution and has been generated using an original sampling frequency, to a requantized output digital signal having a lower degree of resolution than the input digital signal by using a resampling frequency that is higher than the original sampling frequency, comprising: input terminal means (1) coupled to receive said input digital signal; operational circuit means (3) coupled to receive said input digital signal from said input terminal, to produce an output signal; output terminal means (2); and quantizer circuit means (4) coupled to receive said output signal from said operational circuit means, for producing said requantized output digital signal and for supplying said requantized output signal to said output terminal means and to said operational circuit means for producing an output signal A(z) from said operational circuit means; wherein, respectively expressing said input digital signal as X(z), said requantized output digital signal as Y(z), said output signal from said operational circuit means as A(z), and a unit delay time corresponding to a resampling period as z -1 , the signal A(z) is expressed as follows: ##EQU58## where respective constants b, c, d and e simultaneously satisfy all of the following relationships: b≧1/2,e≧0, d+e>0 b(d+e)(c+d+e)-b.sup.2 e-1.2(d+e).sup.2 >0 8b+4c+2d+e<15 8b+4c+2d<14+e.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-06-24 1994-12-24 1995-06-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-06-24 1998-12-24 1999-06-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-06-24 2002-12-24 2003-06-25 $7700.00 Window Closed / Lapsed

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