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US4541102A Expired / Lapsed US ⏱️ 0.0 years remaining

High-speed difference pulse code modulation coder

Assignee: Siemens AG
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Filing: 1983-08-16
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Granted: 1985-09-10
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Expires: 2003-08-16
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Abstract

Abstract A high-speed difference pulse code modulation coder comprises a calculating unit for determining an estimated value, the calculating unit comprising a quantizer which is preceded by three subtractors and has a plurality of outputs for emitting various calculated values. The difference pulse code modulation signal is calculated in a plurality of consecutive steps by way of intermediate values for calculation of a difference pulse code modulation signal, only two calculating steps are required within one period of the pulse code modulation signal to be processed.

Inventors

  • 👤 Hans-Joachim Grallert

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 05:03
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/3002; H03M7/3044

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 274 words
A high-speed difference pulse code modulation (DPCM) coder, comprising: first, second and third subtractors each including an output and first and second inputs, said first input of said first subtractor serving as the input of said coder, for receiving PCM input signals to be coded, said output of said first subtractor connected to said first input of said second subtractor and said output of said second subtractor connected to said first input of said third subtractor; a quantizer including an input connected to said output of said third subtractor, and at least a first output and a second output, and operable to emit at said first output a first calculation value (A 2 ·Δs i ,q) including a quantized DPCM signal value (Δs i ,q) multiplied by the square of a prediction factor (A) and to emit at said second output a second calculation value (A·Δs i ,q) including the quantized DPCM signal value (Δs i ,q) multiplied by the prediction factor (A), said first output of said quantizer connected to said second input of said first subtractor and said second output of said quantizer connected to said second input of said third subtractor, where i indicates an index for a chronological sequence of signal values and q represents quantization; and a calculating unit comprising an input connected to said second output of said quantizer to receive the second quantized DPCM signal and an output connected to said second input of said second subtractor and operable to produce at said output a signal (A 2 ·s i ) including a predicted value (s i ) multiplied by the square of the prediction factor (A).
Claim 2
Dependent Claim 274 words
A high-speed difference pulse code modulation (DPCM) coder, comprising: first, second and third subtractors each including an output and first and second inputs, said first input of said first subtractor serving as the input of said coder, for receiving PCM input signals to be coded, said output of said first subtractor connected to said first input of said second subtractor and said output of said second subtractor connected to said first input of said third subtractor; a quantizer including an input connected to said output of said third subtractor, and at least a first output and a second output, and operable to emit at said first output a first calculation value (A 2 ·Δs i ,q) including a quantized DPCM signal value (Δs i ,q) multiplied by the square of a prediction factor (A) and to emit at said second output a second calculation value (A·Δs i ,q) including the quantized DPCM signal value (Δs i ,q) multiplied by the prediction factor (A), said first output of said quantizer connected to said second input of said first subtractor and said second output of said quantizer connected to said second input of said third subtractor, where i indicates an index for a chronological sequence of signal values and q represents quantization; and a calculating unit comprising an input connected to said second output of said quantizer to receive the second quantized DPCM signal and an output connected to said second input of said second subtractor and operable to produce at said output a signal (A 2 ·s i ) including a predicted value (s i ) multiplied by the square of the prediction factor (A).
Claim 3
Dependent Claim 29 words
The high-speed difference pulse code modulation (DPCM) coder of claim 1, wherein said quantizer further comprises: a third output for emitting the quantized DPCM signal values (Δs i ,q).
Claim 4
Dependent Claim 54 words
The high-speed difference pulse code modulation (DPCM) coder of claim 1, and further comprising: a multiplier connected to said first output of said multiplier and is operable to multiply the first calculation value (A 2 ·Δs i ,q) by the factor (1/A 2 ) to obtain the quantized DPCM signal value (Δs i ,q).
Claim 5
Dependent Claim 48 words
The high-speed difference pulse code modulation (DPCM) coder of claim 1, and further comprising: a multiplier connected to said second output of said multiplier and is operable to multiply the second calculation value (A·Δs i ,q) by the factor (1/A) to obtain the quantized signal (Δs i ,q).
Claim 6
Dependent Claim 123 words
The high-speed difference pulse code modulation (DPCM) coder of claim 1, wherein said calculating unit comprises: an adder, a first multiplier and a second multiplier each including first and second inputs and an output, said first input of said adder connected to said second output of said quantizer, said second input of said adder connected to said output of said first multiplier, and said output of said adder connected to said first input of said multiplier, said second inputs of said first and second multipliers connected to receive the prediction factor (A), said output of said first multiplier connected to said first input of said second multiplier, and said output of said second multiplier connected to said second input of said second subtractor.
Claim 7
Dependent Claim 273 words
A high-speed difference pulse code modulation (DPCM) coder, comprising: first, second and third adders each including an output and first and second inputs, said first input of said first adder serving as the input of said coder for receiving input signals to be coded, said output of said first adder connected to said first input of said second adder and said output of said second adder connected to said first input of said third adder; quantizer means including an input connected to said output of said third adder, and first and second outputs and inversion means and operable to emit at said first output a first calculation value (A 2 ·Δs i ,q) including a quantized DPCM signal value (Δs i ,q) multiplied by the square of a prediction factor (A) and to emit at said second output a second calculation value (A·Δs i ,q) including the quantized DPCM signal value (Δs i ,q) multiplied the prediction factor (A), said first output of said quantizer means connected to said second input of said first adder and said second output of said quantizer means connected to said second input of said third adder, where i represents an index for a chronological sequence of signal values and q represents quantization; and a calculating unit comprising an input connected to said second output of said quantizer means to receive the second quantized DPCM signal and an output connected to said second input of said second adder and operable to produce at said output a signal (A 2 ·s i ) including, a predicted value (s i ) multiplied by the square of the prediction factor (A).
Claim 8
Dependent Claim 273 words
A high-speed difference pulse code modulation (DPCM) coder, comprising: first, second and third adders each including an output and first and second inputs, said first input of said first adder serving as the input of said coder for receiving input signals to be coded, said output of said first adder connected to said first input of said second adder and said output of said second adder connected to said first input of said third adder; quantizer means including an input connected to said output of said third adder, and first and second outputs and inversion means and operable to emit at said first output a first calculation value (A 2 ·Δs i ,q) including a quantized DPCM signal value (Δs i ,q) multiplied by the square of a prediction factor (A) and to emit at said second output a second calculation value (A·Δs i ,q) including the quantized DPCM signal value (Δs i ,q) multiplied the prediction factor (A), said first output of said quantizer means connected to said second input of said first adder and said second output of said quantizer means connected to said second input of said third adder, where i represents an index for a chronological sequence of signal values and q represents quantization; and a calculating unit comprising an input connected to said second output of said quantizer means to receive the second quantized DPCM signal and an output connected to said second input of said second adder and operable to produce at said output a signal (A 2 ·s i ) including, a predicted value (s i ) multiplied by the square of the prediction factor (A).

References Cited (Backward Citations)

US4470146A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-09-09 1989-03-11 1989-09-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-09-09 1993-03-11 1993-09-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-09-09 1997-03-11 1997-09-10 $7700.00 Window Closed / Lapsed

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