US5026669A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of eliminating burrs on a lead frame with a thin metal coating
Assignee: Mitsubishi Electric Corp
•
Filing: 1989-02-24
•
Granted: 1991-06-25
•
Expires: 2009-02-24
Abstract
Abstract A lead frame for a semiconductor device and a method for manufacturing the semiconductor device using the frame, the lead frame comprising a dice pad, inner leads, tie bar, outer leads and a thin metal layer of lead which is hard to melt and is easily transformed formed on the surface of that portion of the inner leads, outer leads and the tie bar which is not covered with the sealing resin. In injection molding of a resin material on the lead frame with a semiconductor chip therein, the gap between the lead frame and the mold is filled while the thin metal layer is transformed by the clamping pressure so that the burr may be prevented from being generated.
Inventors
- 👤 Toshiaki Shinohara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 20:37
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10W74/016; H10W74/40; H10W70/00; H10W70/40; H10W70/456; H10W70/457; H10W74/10; H10W72/00; H10W72/071; H10W72/075; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W72/59; H10W72/90; H10W72/951; H10W72/952; H10W90/00; H10W90/701; H10W90/751; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
211 words
A method for manufacturing a semiconductor device, comprising the steps of: preparing a lead frame for a semiconductor device, said lead frame including a die pad disposed in a central portion for mounting a chip; an inner lead, a tie bar and an outer lead disposed around the die pad; disposing a thin metal layer on surface areas of the inner lead, the outer lead and the tie bar which predetermined surface areas are not to be covered with sealing resin and which surface areas surround another surface area on which sealing resin is to be disposed; mounting a semiconductor chip on said lead frame; clamping said lead frame containing the semiconductor chip between an upper mold and a lower mold of a metal mold so that gaps between said lead frame and said upper mold and said lower mold are filled with and by deformation of said thin metal layer deformed by the clamping pressure; injecting the resin material into a cavity of said metal mold containing and to cover said another surface area, at a temperature which is less than the melting temperature of said thin metal layer; ejecting said resin molded lead frame out of said metal mold; and removing said thin metal layer from said lead frame.
Claim 2
Independent Claim
211 words
A method for manufacturing a semiconductor device, comprising the steps of: preparing a lead frame for a semiconductor device, said lead frame including a die pad disposed in a central portion for mounting a chip; an inner lead, a tie bar and an outer lead disposed around the die pad; disposing a thin metal layer on surface areas of the inner lead, the outer lead and the tie bar which predetermined surface areas are not to be covered with sealing resin and which surface areas surround another surface area on which sealing resin is to be disposed; mounting a semiconductor chip on said lead frame; clamping said lead frame containing the semiconductor chip between an upper mold and a lower mold of a metal mold so that gaps between said lead frame and said upper mold and said lower mold are filled with and by deformation of said thin metal layer deformed by the clamping pressure; injecting the resin material into a cavity of said metal mold containing and to cover said another surface area, at a temperature which is less than the melting temperature of said thin metal layer; ejecting said resin molded lead frame out of said metal mold; and removing said thin metal layer from said lead frame.
Claim 3
Dependent Claim
44 words
A method for manufacturing a semiconductor device according to claim 1 wherein said step of removing said thin metal layer includes the step of dipping the lead frame into a solution for removing said thin metal layer before solder plating of the lead frame.
Claim 4
Dependent Claim
35 words
A method for manufacturing a semiconductor device according to claim 2, wherein said thin metal layer is a layer of lead and, said solution for removing the layer is a 15% solution of nitric acid.
References Cited (Backward Citations)
JPS5242372A
Cited
JPS5332675A
Cited
JPS53145473A
Cited
JPS5779653A
Cited
JPS57202766A
Cited
US4441118A
Cited
JPS59175130A
Cited
US4625228A
Cited
JPS60154650A
Cited
US4750029A
Cited
JPS6285453A
Cited
US4768077A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-06-24 | 1994-12-24 | 1995-06-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-06-24 | 1998-12-24 | 1999-06-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-06-24 | 2002-12-24 | 2003-06-25 | $7700.00 | Window Closed / Lapsed |