Semiconductor memory and method for fabricating the same

Claim 1

A semiconductor memory comprising: capacitors formed at a main surface of a semiconductor substrate for storing information; insulated-gate field effect transistors formed at said main surface of the substrate for reading out the signal charges stored in said capacitors; word lines for applying signals to a gate electrode of the insulated-gate field effect transistors; and data lines for reading out the information stored in said capacitors, wherein the capacitors each include an electrode, the electrode having a first side wall and a second side wall, the first and second side walls being formed substantially vertical to the main surface of the substrate, and the second side wall being surrounded by the first side wall, said capacitor further including a capacitor plate, wherein said capacitor plate is formed adjacent to the first and second side walls and is separated from the first and second side walls by an insulating layer so that said first and second side walls respectively face predetermined portions of the capacitor plate and are respectively separated from said predetermined portions of the capacitor plate by said insulating layer, wherein a source or drain of each of said insulated-gate field effect transistors is respectively connected to said electrode, wherein a drain or source of each of said insulated-gate field effect transistors is connected to one of said data lines, and wherein the gate electrode of each of said insulated-gate field effect transistors is connected to one of said word lines.