Sense amplifier having pull-up circuit controlled by feedback

Claim 2

A sense amplifier comprising: first power source potential transfer means coupled between a power source potential supply terminal and an input terminal, said power source potential transfer means constantly or temporarily transferring the power source potential to said input terminal; inverting means for inverting the logic level of the potential at said input terminal; a first transistor of a first conductivity type connected in series to said first power source potential transfer means between said power source potential supply terminal and said input terminal, said first transistor being switch-controlled by the output signal of said inverting means, said first transistor prohibiting said first power source potential transfer means from transferring the power source potential to said input terminal when said first transistor is off-state, and said first transistor allowing said first power source potential transfer means to transfer the power source potential to said input terminal when said first transistor is on-state; and a second transistor of a second conductivity type connected between said power source potential supply terminal and said input terminal, said second transistor being switch-controlled by the output signal of said inverting means.

Claim 3

The sense amplifier according to claim 1, in which said first power source potential transfer means includes a third transistor of the second conductivity type, said third transistor being temporarily turned on by a first precharge signal from exterior.

Claim 4

The sense amplifier according to claim 1, further comprising: reference potential transfer means connected between said input terminal and a reference potential supply terminal, said reference potential transfer means constantly or temporarily transferring the reference potential to said input terminal; and a third transistor of the second conductivity type connected in series to said reference potential transfer means between said reference potential supply terminal and said input terminal, said third transistor being switch-controlled by said inverting means, said third transistor prohibiting said reference potential transfer means from transferring the reference potential to said input terminal when said third transistor is in a off-state, and said third transistor allowing said reference potential transfer means to transfer the reference potential to said input terminal when said third transistor is in an on-state.

Claim 5

The sense amplifier according to claim 3, in which said reference potential transfer means includes a fourth transistor of the first conductivity type, said fourth transistor being temporarily turned on by a second precharge signal from exterior.

Claim 6

The sense amplifier according to claim 1, further comprising signal output means which includes a second inverting means for inverting the logic level of an output signal of said inverting means.

Claim 7

The sense amplifier according to claim 5, further comprising: second power source potential transferring means connected between said power source potential supply terminal and said input terminal, said second power source potential transferring means constantly or temporarily transferring the power source potential to said input terminal; and a third transistor of the second conductivity type connected in series to said second power source potential transfer means between said power source potential supply terminal and said input terminal, said third transistor being switch-controlled by the output signal of said second inverting means of said signal output means, said third transistor prohibiting said second power source potential transfer means from transferring the power source potential to said input terminal when said third transistor is in an off-state, and said third transistor allowing said second power source potential transfer means to transfer the power source potential to said input terminal when said third transistor is in an on-state.

Claim 8

The sense amplifier according to claim 3, further comprising signal output means which includes a second inverting means for inverting the logic level of an output signal of said inverting means.

Claim 9

The sense amplifier according to claim 7, further comprising: second power source potential transferring means connected between said power source potential supply terminal and said input terminal, said second power source potential transferring means constantly or temporarily transferring the power source potential to said input terminal; and a third transistor of the second conductivity type connected in series to said second power source potential transfer means between said power source potential supply terminal and said input terminal, said third transistor being switch-controlled by the output signal of said second inverting means of said signal output means, said third transistor prohibiting said second power source potential transfer means from transferring the power source potential to said input terminal when said third transistor is in an off-state, and said third transistor allowing said second power source potential transfer means to transfer the power source potential to said input terminal when said third transistor is in an on-state.

Claim 10

The sense amplifier according to claim 1, in which said input terminal is connected to one end of a cell transistor whose another end is coupled with said reference potential supply terminal.

Claim 11

The sense amplifier according to claim 1, in which said sense amplifier senses and amplifies a variation of each bit line of a programmable logic device.

Claim 12

A sense amplifier comprising: first power source potential transfer means coupled between a power source potential supply terminal and an input terminal, said power source potential transfer means constantly or temporarily transferring the power source potential to said input terminal; first inverting means for inverting the logic level of the potential at said input terminal; second inverting means for inverting the output signal of said first inverting means and outputting the inverted signal as an output signal; a first transistor of a first conductivity type connected in series to said first power source potential transfer means between said power source potential supply terminal and said input terminal, said first transistor being switch-controlled by the output signal of said second inverting means, said first transistor prohibiting said first power source potential transfer means from transferring the power source potential to said input terminal when said first transistor is in an off-state, and said first transistor allowing said first power source potential transfer means to transfer the power source potential to said input terminal when said first transistor is in an on-state, and a second transistor of a first conductivity type connected between said power source potential supply terminal and said input terminal, said first transistor being switch-controlled by the output signal of said inverting means.

Claim 13

A sense amplifier comprising: first power source potential transfer means coupled between a power source potential supply terminal and an input terminal, said power source potential transfer means constantly or temporarily transferring the power source potential to said input terminal; first inverting means for inverting the logic level of the potential at said input terminal; second inverting means for inverting the output signal of said first inverting means and outputting the inverted signal as an output signal; a first transistor of a first conductivity type connected in series to said first power source potential transfer means between said power source potential supply terminal and said input terminal, said first transistor being switch-controlled by the output signal of said second inverting means, said first transistor prohibiting said first power source potential transfer means from transferring the power source potential to said input terminal when said first transistor is in an off-state, and said first transistor allowing said first power source potential transfer means to transfer the power source potential to said input terminal when said first transistor is in an on-state, and a second transistor of a first conductivity type connected between said power source potential supply terminal and said input terminal, said first transistor being switch-controlled by the output signal of said inverting means.

Claim 14

The sense amplifier according to claim 11, in which said first power source potential transfer means includes a third transistor of the first conductivity type, said third transistor being temporarily turned on by a first precharge signal from exterior.

Claim 15

The sense amplifier according to claim 11, further comprising: reference potential transfer means connected between said input terminal and a reference potential supply terminal, said reference potential transfer means constantly or temporarily transferring the reference potential to said input terminal; and a third transistor of the first conductivity type connected in series to said reference potential transfer means between said reference potential supply terminal and said input terminal, said third transistor being switch-controlled by said first inverting means, said third transistor prohibiting said reference potential transfer means from transferring the reference potential to said input terminal when said third transistor is in an off-state, and said third transistor allowing said reference potential transfer means to transfer the reference potential to said input terminal when said third transistor is in an on-state.

Claim 16

The sense amplifier according to claim 13, in which said reference potential transfer means includes a fourth transistor of the second conductivity type, said fourth transistor being temporarily turned on by a second precharge signal from exterior.

Claim 17

The sense amplifier according to claim 11, in which said input terminal is connected to one end of the cell transistor whose another end is coupled with said reference potential supply terminal.

Claim 18

The sense amplifier according to claim 11, in which said sense amplifier senses and amplifies a variation of each bit line of a programmable logic device.